x86jit: Add basic support for mapping SIMD

This implements only the VecDo3 ops using SIMD.  It seems to work from the games I've tested.

I'd like to simplify though.  I'm thinking it'd be better to change this pattern:

```c++
	VectorSize sz = GetVecSize(op);
	int n = GetNumVectorElements(sz);

	u8 sregs[4], tregs[4], dregs[4];
	GetVectorRegsPrefixS(sregs, sz, _VS);
	GetVectorRegsPrefixT(tregs, sz, _VT);
	GetVectorRegsPrefixD(dregs, sz, _VD);

	if (fpr.TryMapDirtyInInVS(dregs, sz, sregs, sz, tregs, sz)) {
		...

		ApplyPrefixD(dregs, sz);
		fpr.ReleaseSpillLocks();
		return;
	}

	// Flush SIMD.
	fpr.SimpleRegsV(sregs, sz, 0);
	fpr.SimpleRegsV(tregs, sz, 0);
	fpr.SimpleRegsV(dregs, sz, MAP_NOINIT | MAP_DIRTY);

	...

	ApplyPrefixD(dregs, sz);

	fpr.ReleaseSpillLocks();
```

To something more like:

```c++
	// Things like: VECREGS_D_LOAD, VECREGS_DSZ_HALF, VECREGS_NO_PREFIX, etc...
	VecOpRegs regs = GetVectorRegs(op, VECREGS_DST);

	if (fpr.TryMapVS(regs)) {
		...

		// Or maybe done automatically if mapped?  Just worried about DISABLE.
		regs.FinalizeD();
		return;
	}

	fpr.SimpleRegsV(regs);

	...

	regs.FinalizeD();
```

And also matrices... those are complicated...

-[Unknown]
Some PSP games sure are fond of moving FP numbers as imms to GPRs then moving those to FPR or VFPR though. I wonder if it would be better for us to write them to RAM somewhere and generate loads instead of doing the cross-register-file moves...