Use consistent function naming style
Correct LR set in BL instruction

The BL instruction is 4 bytes in length and not 2 bytes so LR should be
set to current PC + 4 and not current PC + 2.  Found during test code
review.
Cleanup from test code review

This is the first half of the changes that I will make to the tests
based on rereading the ARMv6-M ARM and test source code.
* Update comments to make the test purpose clearer to me on reread.
* Combine lowest field values with highest field values.  This makes
  sure that fields aren't flipped in the decoding phase.  For example
  having all tests of the form "op R7, R7 "-or- "op R7, #-1" wouldn't
  be good.  I also modified some tests to introduce immediate register
  indices instead of just using R0 and R7 over and over again.
* Removed a few redundant tests.  These were tests that were used to
  just get basic functionality working at first and then more
  thorough tests were added later.  The later test then made the
  original test redundant.
* Use INITIAL_* constants when possible instead.  This uses the default
  values of PC, LR, and SP rather than explicitly setting them in tests.
  The tests modified as part of this change were written before I had
  added those constants.
* Some older tests were setting m_context.R[] elements directly rather
  than using the setRegisterValue() helper method.  Corrected those.
* Add LDR literal test which attempts to load from a PC relative offset
  which will lead to a bus error/hard fault.
* There are some instructions which set N and Z flags but should leave
  the C (carry) bit unmodified.  Typically the random initial state of
  the APSR bits will make sure that carry clear and set make it through
  unmodified.  I modified tests such as this to make sure that they
  explicitly validate that carry set and carry clear states are both
  maintained.

Still getting 100% code coverage after these updates.