phb3: Support capp microcode load for murano phb3 dd2.0

Murano phb3 dd2.0's are still being assembled in the lab and tested with capi
cards.  In this case for the surelock effort.

Signed-off-by: Ryan Grimm <grimm@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
phb3: Remove recursive locking

I can't quite figure what this code was trying to do, but
I don't see how it would help, phb3_read_phb_status() should
already have the right amount of locking in the caller.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
p7ioc-phb: Remove recursive locking

I can't quite figure what this code was trying to do, but
I don't see how it would help, phb3_read_phb_status() should
already have the right amount of locking in the caller.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
opal: poller re-entrancy try #3

So my great attempt at avoiding all re-entencies fails due to HBRT... at
least until we have some kind of way to thread things, it will have to
re-enter so let's bite the bullet, make the poller list walking lockless
(we'll handle removal when we have to, ie, not yet) and slightly extend
the coverage of the PSI lock while at it. All the other pollers already
have their own locks anyway so we are actually removing some overhead.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
FSP: Do not reset FSP if Debug in Progress is set

If the DISR Debug in Progress is set, do not bring the PSI link down
irrespective of the DISR's FSP_IN_RR.

The one exception to this case is when the DISR Unit Check is also
set, in which case we should initiate a host-initiated reset. That
will be handled separate from this change as part of the HIR fixes.

Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fsp-sensor: Remove allocation of array storing RIDs on the stack

Dynamically allocate the 'prids' buffer to store the rid values
of an FRC/sensor.

Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fsp: [BZ113133] Don't commit error log for FSP with FSP lock held

While testing PSI failover by injecting a FSP2-PSIC_RX_Status_Error
on psi link 0 we observed that host OS lost connection because
of lock error while creating an error log for timed out response of FSP

In fsp.c we take fsp_lock and create an error log for time out error
with PANIC severity and this in turn will take fsp_lock and
get into a recursion,to avoid this the patch will print
timeout error instead of committing an error log

[ Updated to still commit the log, but do so after the FSP lock
  has been released -- BenH
]

Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
dump: [BZ111827] Update dump log severity

As per discussion with Vasant updated severity of the
the dump logs.

Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
elog: Update OPAL component IDs

This patch is to update OPAL component IDs to ASCII string.
Currenty on FSP error log parser tool display junk character for
sapphire componenet IDs.

This patch will fix the bug for parsing sapphire componenet IDs on FSP.

For example for component CODEUPDATE(CU), currently we pass 0x1000
as the component ID, instead of passing 0x1000, we pass  ASCII
string of 'CU' i.e 0x4355.

Note: the SRC's would still remain unaltered, and this would be only
for display purpose

Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CUPD: Handle FSP R/R

At present, if FSP R/R happens while retrieving marker LID,
then we don't get marker LID from FSP and this will result
in inband code update failure.

This patch handles FSP R/R.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CUPD: Use consistent component name for error logging

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Reviewed-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CUPD: Rename codeupdate.h as fsp-codeupdate.h

Rename the header file to reflect that this code is only to support
code update on FSP based sytem. No change in actual header file.

[ Move the file to hw/fsp as it doesn't export anything to the rest
  of the world -- BenH
]

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Acked-by: Stewart Smith <stewart@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CUPD: Improve elog in code update path

Log exact failure reason in code update path. Also removed
possible duplicate error logging.

Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Reviewed-by: Deepthi Dharwar <deepthi@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
fsp: Move fsp-leds.h to hw/fsp

This is not used to export any function to the generic skiboot

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
P7IOC: Grab PHB version

We need apply errata based on PHB version in future. So lets grab
it at PHB initialization time.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
core: PCI error injection API

The patch introduces new OPAL API opal_pci_err_injct() for injecting
PCI errors.

Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
P7IOC: Support error injection

The patch implements P7IOC backend to support error injection. There are
3 registers (control, address and mask) for each P7IOC PHB to do error
injection. The way to do error injection is straight-forward. For IO,
MMIO and PCI-CFG error injection, we check the address is valid or not.
The address will be used for error injection if that's valid. Otherwise,
we have to figure one out from IODT, M32DT or PELTM.

As DMA address is natually invisible to users, we just figure it out from
TVT and use that for error injection.

64-bits error injection will be supported later.

Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
PHB3: Support error injection

The patch implements phb3 backend to support error injection. For MMIO
and PCI-CFG error injection, we check the address is valid or not. The
address will be used for error injection if that's valid. Otherwise,
we have to figure one out from M32DT or RTT_TABLE.

As IO space isn't supported on PHB3, we're not going to support IO error
injection on PHB3.

All PEs have same DMA space. So we can't distinguish individual PE's
space and don't support DMA error injection for now. Perhaps we don't
understand how to do that. It needs more time for more investigation.

64-bits error injection will be supported later.

Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
PCI: Clear PAPR error injection

Though the p7ioc spec states the errors triggered by PAPR error
injection register set (0x2b0, 0x2b8, 0x2c0) should be one-shot
without "sticky" bit, Firebird-L machine doesn't follow the rule.
It will cause endless frozen PE until we have to remove the PE
permanently.

The patch extends opal_pci_reset() allowing kernel to clear PAPR
error injection register set at appropriate point.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
PCI: Allow to set frozen state

The patch introduces a new OPAL API opal_pci_eeh_freeze_set(),
which allows to set frozen state for the specified PE, so that
we can support "compound" PE in kernel.

Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>