inteltool: refine GPIO and PMBASE/TCO printing on Ibex Peak/5 Series

Nicolas Reinecke was noticing that in my Lenovo T410s logs the GPIO*3
settings were missing. This led to some investigation and this patch, thanks!

Change-Id: I7ba28aa00d10f988a7fe81e61d2e216b54a11006
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: http://review.coreboot.org/7239
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
intel_wifi: Export the SMBIOS structure required by intel driver.

Change-Id: I22984a1bc7ca3be6593143af4fce8d5bfe469837
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7295
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Revert "gigabyte/ga-b75m-d3h: Add new Intel mainboard"

Breaks abuild and is dependent on WIP, is WIP itself.

This reverts commit d7d0c8134854cba72f0c3fe25946b27ce0364b43.

Change-Id: I8b589b41632696aa4570abcceab5f3a3b0784649
Signed-off-by: Vladimir Serbinenko  <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7319
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
AGESA f12: Add "const" modifiers

Apply commit 283ba78415 to f12 (literally, plus one adaptation).

Change-Id: Ied7891806e269320caf968cae3de3dc792c5f8fd
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7312
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
AMD boards: constify romstage variables

That takes them out of .data

Change-Id: Idf88ddaacb2f78ba6a0260e3511b34edc269731d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7313
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
cbfstool: Convert cbfs-mkstage.c into pelf

Change cbfs-mkstage to use parsed elf instead of calling elf_headers. That
allows us to have access to the complete elf including the string table.

Change-Id: Ie767d28bdf41af38d1df0bce54bc0ada45123136
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/7303
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
cbfstool: Add option to ignore section in add-stage

Allow add-stage to have an optional parameter for ignoring any section. This is
required to ensure proper operation of elf_to_stage in case of loadable segments
with zero filesize.

Change-Id: I49ad62c2a4260ab9cec173c80c0f16923fc66c79
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/7304
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
romstage: Pass .car.data as ignored section while adding romstage

We don't want segment for .car.data section to be considered while elf_to_stage
transformation is being done. Thus, use -S option for add-stage.

Change-Id: I04868c892e3aa94113189b012d284d52bacea5f0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: http://review.coreboot.org/7305
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
build: fetch submodules as required

Also document the unusual git feature we employ for 3rdparty

Change-Id: I1d1c986f9d1c4dd8db687d746dbdeb510679141a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7243
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
superio/ite: Use common dispatch for pnp entry/exit functions

We already have these implemented under superio/common, use
those instead of this copy-paste syndrom.

Change-Id: I7c7737e0b3c284d8b14b36c70681ab2269bb1d4b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7310
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
mainboard/dmp/vortex86ec: Unused variable in romstage.c

Change-Id: I9cc549b7862ee535928bd06b5fb4bd38bb67a992
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7279
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Redundant addr '&' operator on func ptr's in struct initiator

Bring code inline to be consistent with the rest of coreboot.

See standard - c99std (n1256) 6.3.2.1p4 - to paraphrase,
'expressions that refer to functions get converted to pointers to
those functions'

Change-Id: I63a7bed5efade37dd7076dbfc9c85d420cf6c92b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7290
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
amd/agesa/f16kb: Invalid inline asm in gcc-intrin.h

Forward port commit:
db0e0e2 amd/agesa/*/gcc-intrin.h: Invaild inline asm

Change-Id: Ia857f76d3782aea07e09df1352eeb286e40b2689
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7302
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
inteltool: Add support for Haswell ULT and Lynx Point LP

Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com>
Change-Id: I2d5a31c831afeb92522b2673fde82922dc4efca5
Reviewed-on: http://review.coreboot.org/7275
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
abuild: fix cross compiler test

Actually abort if a cross compiler is missing, but also handle
subarchitectures (currently: armv4 and armv7 for arm)
properly.

Change-Id: Idf37fb029178df6f2ac029466c66aaa2010bdbd2
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7297
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
inteltool/sandybridge: Kill mch_registers codepath.

It never worked.

Change-Id: Ic68614bb8ed481babf54b4f9d8db00635755f4d1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7324
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
i82801gx: Handle whole FADT in southbridge.

Do all the handling in SB code with few parameters from devicetree.cb
instead of having mobo callbacks.

Change-Id: I8fd02ff05553a3c51ea5f6ae66b8f5502509e2bc
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7199
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
inteltool: Show more info on sandy/ivy.

Change-Id: I408614e743ab6f0f447b327c01d8f4dacf787124
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6692
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
ARM: Use local versions of libgcc functions instead of linking against libgcc.

The flags used to compile libgcc may make it incompatible with the code it's
linked against, and/or the hardware it's going to run on. Rather than try to
tease the right libgcc from the compiler, lets just leave it out and use our
own implementations of the necessary functions.

Most of these implementations were taken from the Linux kernel, except for
uldivmod.S which was taken from a CL originally written for U-Boot by
Che-Liang Chiou in December of 2010. It was modified to not use the CLZ
instruction on machines that don't have it, anything earlier than ARMv5. The
top block was taken from an earlier version of the same CL which didn't use
CLZ in that spot. The later block was written from scratch.

BUG=None
TEST=Built and booted into the bootblock on nyan. Ran a series of tests which
divided and modded a 64 bit value by various 32 bit values which were powers
of 2. Confirmed that this function was used and that the returned value was
correct. Printed decimal and hex versions of some values and verified that
they equaled each other. Built and booted on pit with serial enabled.
BRANCH=None

Original-Change-Id: I7527e28af411b7aa7f94579be95a6b352a91a224
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/172401
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit be8c7a8f3292a7d7651b7c6dafc9a2c53afbd402)

*** This second patch is cherry-picked and squashed again to
*** pick up the libgcc changes that were skipped previously.

arm: Move libgcc assembly macros to arch/asm.h

libgcc/macros.h contains some useful assembly macros that are common in
Linux kernel code and facilitate things such as unified ARM/THUMB
assembly. This patch moves it to a more general place where it can be
used by other code as well.

BUG=None
TEST=Snow still boots.

Original-Change-Id: If68e8930aaafa706c54cf9a156fac826b31bb193
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/182178
Original-Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit a780670def94a969829811fa8cf257f12b88f085)

*** Additional changes for stage specific builds

Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Ie3e48f34ebf6fbe20c3dd76ecbcbea7844e9466e
Reviewed-on: http://review.coreboot.org/7322
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
soutbridge/*/bootblock: Use pci_dev_t over device_t typedef

Change-Id: I693b09d588ed6d56177cf86c23497231623b69c0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7193
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>