[FIX] Fix SDO busy intern after CN reset command

The intermediate state InternalAbort must be left, when SDO connection
is closed after node reset or IdentResponse. Otherwise it remains in
this state and the application isn't allowed anymore to perform SDO
transfers to this CN.

Based on change for V1.8.5 of
Daniel Krueger <daniel.krueger@systec-electronic.com>

Change-Id: Id02ecf47f021af2df2b5249391576d7f0f300f88
[FIX] Fix used interrupt api for Altera IP-Cores

The drivers for openMAC and Host Interface IP-Cores support the enhanced
interrupt api only. This missing definition is added to the *_sw.tcl
files.

Change-Id: I2467d56322a3770b84a6254242b5f45a6cb24b93
[FIX] Fix warnings in openMAC drivers

Solve warnings in openMAC drivers.

Change-Id: I81a1745b56f3af0a2f16f58e64de5b626363681d
[FIX] Fix warnings in host interface SW modules

Solve warnings in host interface software driver and control CAL
modules.

Change-Id: I9f773c835a1f2fc185253ff982e187352a36f045
[FIX] Fix dereferencing warning in pdo CAL

Solve "type-punned pointer will break strict-aliasing rules" warning
due to call of pdokcal_allocateMem with local variable pPdoMem_l.
Instead the call is done with a temporary pointer assigned to
the local variable afterwards.

Change-Id: I10fbfff374688cef5048dcad3dc25f37c55e5d61
[FIX] Fix plkload to correctly handle multiple threads/irqs

For some drivers multiple IRQs and IRQ threads could exist. plkload
is fixed to work correctly even if there are several threads and
interrupts.

Change-Id: I0df74842bc14ea4d725dd59453c721aa97c7dfdf
[FIX]  Reimplement handling of PRes in transition DLL_CT4

Reimplement handling of PRes in transition DLL_CT4 in state
DLL_CS_WAIT_SOC as specified in EPSG 301. This covers the following
situations on CN implementations:
1. Just one SoC from MN is lost, because of EMI for example. So the
   next cycle starts with a PRes instead of SoC.
2. Multiple SoCs and the frames in between were lost, because of short
   cable disconnect for example (but frame timeout didn't occur yet).
   So the next cycle which is received by MN starts with a PRes.
3. A late PRes from another CN is received (PRes between SoA and SoC).
   On this CN this is handled as a loss of SoC, but the next SoC isn't
   actually lost. There is just a wrong PRes on the network.

The latter situation might be the reason why the PRes case has been
commented since the early versions of this stack. Why should one CN
care about mistakes of another CN? The answer is that the POWERLINK
network shall provide a deterministic real-time communication and
errors must not remain undetected.

Futhermore, with this fix we indirectly catch the case that an
openPOWERLINK MN (without further hardware support like frame
timestamps) cannot detect late PRes after the SoA. Now another CN
would increment its Loss-of-SoC error counter and force it to go back
to PreOp1 when the threshold is exceeded. For the user the root cause
of this error is a little bit hard to detect, but the error is unveiled
(if there are at least too CNs in the network).

Based on change for V1.8.4 by
Daniel Krueger <daniel.krueger@systec-electronic.com>

Change-Id: Ib5f41389bf4d43fd116e17a1256da43ceb92f14e