cpufreq: interactive: Add max_freq_hysteresis feature

Previously known as sampling down factor, max_freq_hysteresis
extends the period that interactive governor will stay at policy->max.
This feature is to accomodate short idle periods in an otherwise very
intensive workload.

When the feature is enabled, it ensures that once a CPU goes to max
frequency, it doesn't reduce the frequency for max_freq_hysteresis
microseconds from the time it first goes to idle.

Change-Id: Ia54985cb554f63f8c22d0b554a0a0f2ed2be038f
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
cpufreq: interactive: Make window alignment optional

Make sampling window alignment optional when scheduler inputs
are not enabled.

Change-Id: If69c111a3efe219cdd1e38c1f46f03404789c0bb
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
cpufreq: interactive: Exercise hispeed settings at a policy level

If a heavy task migrates between otherwise idle CPUs in a policy during
every sample window, the above hispeed delay window for the CPUs would get
restarted for every sample window. Due to the continuous restart of above
hispeed delay window, none of the CPUs would ever pick a target frequency
higher than hispeed frequency. This causes the policy's frequency to be
stuck at hispeed freq even if the load justifies a higher frequency.

To fix this, the above high speed delay window is restarted only when the
policy frequency changes. This ensures that tasks migrating between CPUs in
a policy are handled correctly.

Also, the hispeed load/frequency heuristic is only necessary when the
information is insufficient to determine if the load on the CPU needs at
least hispeed frequency. When the policy frequency is already at or above
hispeed frequency, if the CPU load% based on policy frequency is not above
hispeed load, then the information is clearly sufficient to determine that
the load on the CPU does not need hispeed frequency.

Therefore, compute CPU load% (which is used only to compare against hispeed
load) based on policy frequency instead of CPU target frequency.

Change-Id: I1749d663949e34753ecb5c426a16563796f8b0b2
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Revert "rtc: alarm: Proper handling of spinlock"

Improper handling ultimately breaks reboot to recovery/download.

This reverts commit 537d9288198b49c04206981949ad875a3d3d9d91.

Change-Id: I603b463625d6a31a5ed3caaf219b0a36d180fdbe
rtc: alarm: Proper handling of spinlock

Real proper.

Change-Id: I58c01e5d307dfbafa8e8bdad71c4521212524bbb
crypto: msm: check NULL pointer in _qcrypto_setkey_des()

add NULL pointer check before des_ekey()

Change-Id: I57c40b82fc5141c1666c3fd493b43e962f0d1ae9
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Add support for aead

Add support for aead mode algorithms (simultaneous auth
and cipher operations)

Change-Id: I22cc530f8fe822504649cb3c60030a729e1305c2
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
crypto: msm: fix aead combined mode decipher problem

Fix -EBADMSG error for crypto 5.1 and above for aead decipher.
bam dma input/output length should include asso data plus iv plus crypto
data, and excluding MAC result for deciphering.

Change-Id: I0aaa666dbe96185cf0a81a542b3df02d4f6ebf88
Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
crypto: msm: Fix Uninitialized flags

Due to uninitialized "flags" field in the request structure,
incorrect choices are made in the qce driver layer with
regards to setting crypto hardware registers.

Initializing the flags fixes this incorrect setting of the
registers.

Change-Id: Ic40319ea5e15e66cbafd28f727a9bcc6ea41b1ca
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
crypto: msm: check potential integer overflow on AEAD req length

According to the specification of AEAD, AEAD request cryptlen is
not a Fixed maximum and assoclen is also same. This could lead to
potential integer overflow, thus allocating less memory. So we
need to check potential integer overflow on AEAD request length.

Change-Id: I58a0c5e1a6e890bad30f7865e96b7db46337158c
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: multiple qce50 support

In some platforms such as fsm9900, multiple instances of qce50 hw
may be supported.  Each qce50 HW has an ndp-bam. Each qce50 HW
can support multiple instances of qce_dev platform device.
Each qce_dev has its own configured pipe set and associated qce50 HW,
defined by crypto-base and bam-pipe-pair fields in the device tree files.
This patch based on io address, it decides to create a new qce50 hw
instance or use the existing known instance at device probe time.

Furthermore, this patch does iomap for only once for each HW BAM instance
to avoid issue with bam driver. If modprobe, and rmmod of qcedev,
and qcrypto are not in first in last out order, kernel may crash in
bam driver in the last rmmod.
This saves virtual space for IO if multiple instances of qcedev
share the same instance of HW BAM.

Change-Id: I1565b1976981b0512832ff793e0adb29c4be3ccc
Acked-by: Chemin Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: Fix memory leak in bam_release call

Release pmab memory when an error occurs as well.

Change-Id: I7aa13d5a03edbdfa806345039459feaeac6e7a11
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Revert "crypto: Fix memory leak in bam_release call"

This reverts commit I7aa13d5a03edbdfa806345039459feaeac6e7a11, which
release pbam memory when an error occurs. However, on a device with
multiple ce, pbam memory is shared by multiple pce_dev, it can only
be freed when the reference count goes to zero, and can not be
released it if reference count is not zero when an error occurs.
The previous implementation on bam_release was correct, so we
revert commit I7aa13d5a03edbdfa806345039459feaeac6e7a11.

Change-Id: Id8bab91f57fe8056e441afdeae45d7dabbd1eae8
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Fix issues related to non-zero byteoffset input

Fix buffer overflow for a non-zero byteoffset value.

Also fixes memory leak issue by adding data_len check in check_params.
One of the scenarios data_len can be less than byteoffset which results
in memory leak with huge data length, which might cause the kernel panic.

Change-Id: I3f773673219f45dad4f17499b1ee0feda2aff1f7
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
crypto: msm: Remove invalid check in qcedev driver

Unsigned int variable is compared for < 0, which is an invalid if
condition. This patch removes the check.

Change-Id: I76c10223672db2c387e025697dd8bd921e5ddc1b
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
crypto: msm: Use scnprintf() instead of snprintf()

snprintf can return more than the size of buffer, which is not
expected here, obviously. Use scnprintf instead.

Change-Id: I3b97a016df910728dfef5a0914ab8ad67c68e39c
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
crypto: msm: Fix null pointer exception in qcrypto_count_sg()

Fixes null pointer exception in count scatter gather function. Scatter
gather list pointer become NULL if the sg pointer reaches last but one
node, which results in NULL pointer exception.

Change-Id: I634baf30074e6e53ffa22635565da54e9ae43150
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
crypto: msm: Handle error case

Release memory and disable clk when sps_init fails.

Change-Id: If0bad4c96c9c9ee24ea87751c186aa26ff3bc14f
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: Add support for setting XTS data unit size

Based on the context flags set by client, set XTS_DU_SIZE
register to sector size of 1KB, or the actual total length
of the packet.

Change-Id: I2524b006bafdc9e1aa435ad1a6965155196205b0
Signed-off-by: Mona Hossain <mhossain@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
crypto: msm: optimize ce bandwith scaling

Encryption processing at qcrypto driver includes three main steps:
set ce high bandwidth and enable ce clock in cra_init, then send
encrytion request, and at last set ce low bandwidth and disable
clock in cra_exit. This process is fine for the use case where
there are lots of requests between cra_init and cra_exit, but will
introduce large overhead for mmc layer disk encryption as it calls
cra_init, queue request and cra_exit for every encryption request.

It is not necessary to set low bandwidth and disable clock for every
encrypt request when it is completed. So we delay these scaling down
tasks for a while, and just scale down the last request when timer
expires so as to amortize and decrease the overhead.

Change-Id: I26690c0fb1752c5da1e0198a301071658696a72e
Signed-off-by: Zhen Kong <zkong@codeaurora.org>