i965/fs: Fix bad whitespace.
i965/fs: don't read from uninitialized memory while assigning registers

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
i965/fs: set virtual_grf_count in assign_regs()

This lets us call dump_instructions() after register allocation without
failing an assertion.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <connor.abbott@intel.com>
i965: Support the allow_glsl_extension_directive_midshader option.

This adds support for Marek's new driconf parameter, which avoids
totally white rendering in Unigine Valley (which attempts to enable
the GL_ARB_sample_shading extension in an illegal place).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75664
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965/guardband: Improve comments for guardband clipping

While working in this part of the code I had a great deal of trouble
understanding what it was trying to do, and matching it with the spec.
(mostly due bad wording in the PRM). To help future people, I've cleaned
up the wording and provided some ascii art.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
i965: Simplify viewport extents programming on GEN8

Viewport extents are a 3rd rectangle that defines which pixels get
discarded as part of the rasterization process. The actual pixels drawn
to the screen are an intersection of the drawing rectangle, the viewport
extents, and the scissor rectangle. It permits the use of guardband
clipping in all cases (see later patch). The actual pixels drawn to the
screen are an intersection of the drawing rectangle, the viewport
extents, and the scissor rectangle.

Scissor rectangle is not super important for this discussion as it should
always help do the right thing provided the programmer uses it.

switch (viewport dimensions, drawrect dimension) {
   case viewport > drawing rectangle: no effects; break;
   case viewport == drawing rectangle: no effects; break;
   case viewport < drawing rectangle:
      Pixels (after the viewport transformation but before expensive
      rastersizing and shading operations) which are outside of the
      viewport are discarded.
}

I am unable to find a test case where this improves performance, but in
all my testing it doesn't hurt performance, and intuitively, it should
not ever hurt performance. It also permits us to use the guardband more
freely (see upcoming patch).

v2: Updating commit message.

v3: Commit message updates requested by Ken

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/guardband: Enable for all viewport dimensions (GEN8+)

The goal of guardband clipping is to try to avoid 3d clipping because it
is an expensive operation. When guardband clipping is disabled, all
geometry that intersects the viewport is sent to the FF 3d clipper.
Objects which are entirely enclosed within the viewport are said to be
"trivially accepted" while those entirely outside of the viewport are,
"trivially rejected".

When guardband clipping is turned on the above behavior is changed such
that if the geometry is within the guardband, and intersects the
viewport, it skips the 3d clipper. Prior to GEN8, this was problematic
if the viewport was smaller than the screen as it could allow for
rendering to occur outside of the viewport. That could be mitigated if
the programmer specified a scissor region which was less than or equal
to the viewport - but this is not required for correctness in OpenGL. In
theory you could be clever with the guardband so as not to invoke this
problem. We do not do this, and have no data that suggests we should
bother (nor the converse data).

With viewport extents in place on GEN8, it should be safe to turn on
guardband clipping for all cases

While here, add a comment to the code which confused me thoroughly.

v2: Update grammar in commit message. Reword comments based on Ken's
suggestion.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/clip: Removing scissor atom

Now that we no longer use ctx->DrawBuffer->_Xmin and related fields to
program the screen-space viewport extents, we don't depend on any
scissoring state.  So we can drop the +_NEW_SCISSOR dependency.

On GEN8, a change in scissor state does not effect anything for the
clipper/sf hardware state. The hardware will always do the right thing
once the viewport extents are programmed. We can therefore remove the
unecessary state emission.

Ken originally spotted this.

v2: Reword the commit message. Remove spurious hunk.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
i965/eu: Change gen == 7 to gen >= 7 in a couple brw_eu_emit.c cases.

Broadwell is going to use the brw_eu_emit.c code soon.  We want to get
the fake MRF handling and URB HWord channel mask handling.

We don't need the CMP thread switch workaround, though.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Use Haswell atomic messages on Broadwell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Explicitly disable instruction compaction on Broadwell for now.

Until now, it's been off implicitly: we never call the compactor
function.  When we merge the generators, we'll start calling it, so we
should make it do nothing.

Matt will enable instruction compaction properly later.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Port Broadwell CMP destination type hack to brw_eu_emit.c.

See gen8_generator::CMP().

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Make it clear that brw_find_loop_end only runs on Gen6+.

It has Gen6+ knowledge baked in, and indeed is only called for Gen6+,
but it wasn't immediately obvious that this was the case.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Make it clear that brw_patch_break_count only runs on Gen4-5.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Set UIP on ELSE instructions on Broadwell.

Broadwell adds UIP on ELSE instructions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Refactor jump distance scaling to use a helper function.

Different generations of hardware measure jump distances in different
units.  Previously, every function that needed to set a jump target open
coded this scaling, or made a hardcoded assumption (i.e. just used 2).

Most functions start with the number of instructions to jump, and scale
up to the hardware-specific value.  So, I made the function match that.

Others start with a byte offset, and divide by a constant (8) to obtain
the jump distance.  This is actually 16 / 2 (the jump scale for Gen5-7).

v2: Make the helper a static inline defined in brw_eu.h, instead of
    an actual function in brw_eu_emit.c (as suggested by Matt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Update jump distance scaling for Broadwell.

Broadwell measures jump distances in bytes, so we need to scale by 16.

v2: Update the function in brw_eu.h, not in brw_eu_emit.c.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965/eu: Allow math on immediates on Broadwell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Matt Turner <mattst88@gmail.com>
i965: Don't check for format differences when using the blorp blitter

Previously the blorp blitter wouldn't be used if the source and destination
buffer had a different format other than swizzling between RGB and BGR and
adding or removing a dummy alpha channel. However there's no reason why the
blorp code path can't be used to do almost all format conversions so this
patch just removes the checks. However it does explicitly disable converting
to/from MESA_FORMAT_Z24_UNORM_X8_UINT because there is a similar check
brw_blorp_copytexsubimage.

This doesn't cause any Piglit test regressions at least on Ivybridge.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
configure.ac: Do not require llvm on x32

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Maarten Lankhorst <dev@mblankhorst.nl>