ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks

Define the available clock for mprddr and take both mpddr_clk and ddrck in the
ram controller driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: at91sam9: use ddrck in ramc

Make the ram controller driver take the ddrck clock for at91sam9n12 and
at91sam9x5.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM: at91/dt: Declare a second ram controller when relevant

The G45 and 9263 SoCs has two identical ram controller, that are defined as a
single node, with two reg cells.

The proper way to support such a case is to have two separate DT nodes.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
ARM: at91/dt: sama5d3: Add shutdown controller

The SAMA5D3 has a shutdown controller identical to the sam9x5 SoC family.
Declare it in the DT.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>