add replace_variable for variable names but not used yet
add an option to reduce datapath to RRG
some modification add graph copy capability
finished
modified to compile with g++ 4.8.1
Merge branch 'datapath' of https://github.com/wsong83/Asynchronous-Verilog-Synthesiser into datapath
add saifsaif and Makefiles for it
add a command read_saif to read saif files
before test read_saif command
seems saif file is read correctly
add a new input port type SDFG_IPORT_CLK in dfg_node
implementing clock_detect in dfg_graph_avs.cpp
seems I do not a new type, it is not a good idea
annotate to SDFG pass compilation
annotation passes compilation
read for annotation test
able to annotate and show toggle rates on SDFG graphs
format the toggle output in PDF figures
saif annotation finished, now think about how to use this information
Merge branch 'datapath' into dev