Rename X86insrtps to the proper instruction name.

Summary:
The INSERTPS pattern fragment was called insrtps (mising 'e'), which
would make it harder to grep for the patterns related to this instruction.
Renaming it to use the proper instruction name.

Reviewers: nadav

CC: llvm-commits

Differential Revision: http://reviews.llvm.org/D3443

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206779 91177308-0d34-0410-b5e6-96231b3b80d8
Use value semantics to manage DbgVariables rather than dynamic allocation/pointers.

Requires switching some vectors to lists to maintain pointer validity.
These could be changed to forward_lists (singly linked) with a bit more
work - I've left comments to that effect.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206780 91177308-0d34-0410-b5e6-96231b3b80d8
Use unique_ptr to manage objects owned by the ScheduleDAGMI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206784 91177308-0d34-0410-b5e6-96231b3b80d8
Use unique_ptr to handle ownership of UserValues in LiveDebugVariablesImpl

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206785 91177308-0d34-0410-b5e6-96231b3b80d8
Use unique_ptr to handle ownership of GCOVFunctions in GCOVProfiler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206786 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify expression that was explicitly naming an operator overload in a call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206788 91177308-0d34-0410-b5e6-96231b3b80d8
Fix PR7272 in -tailcallelim instead of the inliner

The -tailcallelim pass should be checking if byval or inalloca args can
be captured before marking calls as tail calls.  This was the real root
cause of PR7272.

With a better fix in place, revert the inliner change from r105255.  The
test case it introduced still passes and has been moved to
test/Transforms/Inline/byval-tail-call.ll.

Reviewers: chandlerc

Differential Revision: http://reviews.llvm.org/D3403

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206789 91177308-0d34-0410-b5e6-96231b3b80d8
Use unique_ptr to handle GlobalOpt's Evaluator members

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206790 91177308-0d34-0410-b5e6-96231b3b80d8
clang-format this function.

No functionality change, it will just make the next patch easier to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206792 91177308-0d34-0410-b5e6-96231b3b80d8
Handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode.

With this MC is able to handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode, which is
needed for medium and large code models.

This fixes pr19470.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206793 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify destruction of Modules in LLVContextImpl.

This avoids copying the container by simply deleting until empty.

While I'd rather move to a stricter ownership semantic (unique_ptr),
SmallPtrSet can't cope with unique_ptr and the ownership semantics here
are a bit incestuous (Module sort of owns itself, but sort of doesn't
(if the LLVMContext is destroyed before the Module, then it deregisters
itself from the context... )).

Ideally Modules would be given to the context, or possibly an
emplace-like function to construct them there. Modules then shouldn't be
destroyed by LLVM API clients, but by interacting with the owner
(LLVMContext) directly (but even then, passing a Module* to LLVMContext
doesn't provide an easy way to destroy the Module, since the set would
be over unique_ptrs and you'd need a heterogenous lookup function which
SmallPtrSet doesn't have either).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206794 91177308-0d34-0410-b5e6-96231b3b80d8
Remove seemingly-unneeded artificial dependency

The rationale for this artificial dependency seems to have been lost to the
ravages of time, it is covered by no regression tests, and has no impact on
test-suite performance numbers on either x86 or PPC.

For the test suite, on both x86 and PPC, I ran the test suite 10 times (both as
a baseline and with this change), and found no statistically-significant
changes.  For PPC, I used a P7 box. For x86, I used an Intel Xeon E5430. Both
with -O3 -mcpu=native.

This was discussed on-list back in January, but I've not had a chance to run
the performance tests until today.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206795 91177308-0d34-0410-b5e6-96231b3b80d8
Use unique_ptr to manage ownership of GCOVFunctions, Blocks, and Edges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206796 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: Extended addressing mode source reg is 64-bit.

The canonical form for the extended addressing mode (e.g.,
"[x1, w2, uxtw #3]" is for the MCInst to have the second register be the
full 64-bit GPR64 register class. The instruction printer cleans up
the output for display to show the 32-bit register instead, per the
specification.

This simplifies 205893 now that the aliasing is handled in the printer
in 206495 so that the codegen path and the disassembler path give the
same MCInst form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206797 91177308-0d34-0410-b5e6-96231b3b80d8
Move helper functions earlier in the file.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206798 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: Improve diagnostics for malformed reg+reg addressing mode.

Make sure only general purpose registers are valid for offset regs and
that 32-bit regs are only valid for sxtw and uxtw extends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206799 91177308-0d34-0410-b5e6-96231b3b80d8
Use Regex objects by value (rather than 'new'ed) in CodeGenSchedule.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206800 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify a vpermil* with constant mask.

With a constant mask a vpermil* is just a shufflevector. This patch implements
that simplification. This allows us to produce denser code. It should also
allow more folding down the line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206801 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: Refactor away a few redundant helpers.

The comment claimed that the register class information wasn't available
in the assembly parser, but that's not really true. It's just annoying to
get to. Replace the helper functions with references to the auto-generated
information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206802 91177308-0d34-0410-b5e6-96231b3b80d8
Set default value of HasExtractBitsInsn to false

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206803 91177308-0d34-0410-b5e6-96231b3b80d8