zynq: qspi is using standard num-cs binding

Use num-cs instead of num-chip-select.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: qspi has changed clock binding

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: gic: Remove address-cells and size-cells

Based on http://www.spinics.net/lists/arm-kernel/msg321598.html

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for Vivado 2014.1

Vivado 2014.1 requires some changes:
- MLD structure changes
- Adding MSS for automatic console selection
- Update copyrights
- Remove dead code
- Move xget... to HSM functions
- Remove previous versions workarounds
- Remove OPB/PLB/DCR IPs/Buses
- Microblaze contains some PLB setting - do not generate it
- Remove ppc4xx CPU support
- Use some debug info instead of pure puts
- Remove slaveip_axi procedure and optimize axi_tft IP

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
pl330: Don't need to generate primecell-periphid

pl330 is properly detected by mainline driver.
No need to rewrite perphid value.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Append information about arasan sdhci version

Just follow proposed binding for the mainline kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Generate usb-reset when gpio pin is select

Check that value we get from C_USB_RESET is valid
integer.
On Vivado cc108 hw design incrrect output was generated.
"usb-reset = <&ps7_gpio_0 <Select> 0>;"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Extend default_parameters proc to ignore some parameters

This will be used for ignoring some reset parameters
which are generated differently.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Introduce ps7_reset_handle

Have one function which can all all MIO cases for usb, ethernet, i2c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Generate i2c and enet reset MIO connection in proper way

Generate proper enet and i2c reset values.
enet-reset = <&ps7_gpio_0 47 0>;
i2c-reset = <&ps7_gpio_0 46 0>;

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix clk name for new arasan ehci driver

Sync with mainline version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Do not generate new Vivado IPs

There are no drivers for these IPs that's why do not
introduce binding for them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Generate OCM node compatible with Linux driver

Instead of generating OCM address range which is fixed
to 0 or 0xFFFc0000, generate ocm MMIO config IP.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
axivdma: Make boolean DT properties real bools

This patch makes the DT properties, include-sg
and include-dre as boolean.
This is the change following the commit on linux,
"dma: xilinx: vdma: Make boolean DT properties real bools"
 (sha1: c819c9f7bf7648a33e0a039e1569cf751f865127)

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Microblaze CCF node generation

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Synchronize CAN nodes generation

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Extend compatible property for SMC

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Don't look for ethernet attached to axi_dma when MM2S channel disabled

Signed-off-by: Patrick Doyle <wpd@harvestai.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: Generate proper ddrc compatible string with version suffix

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynq: i2c: Generate clock-frequency

clock-frequency is the part of standard i2c binding.
bus-id was replaced by platform id.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>