clover: Update OpenCL headers to version 1.2 from Khronos.

The C++ headers are *not* updated because they rely on CL 1.2 APIs
that we do not implement yet when the core CL 1.2 headers are present.

Acked-by: Tom Stellard <thomas.stellard@amd.com>
clover: Avoid warnings from references to deprecated CL 1.1 APIs.

Acked-by: Tom Stellard <thomas.stellard@amd.com>
clover: Align kernel argument sizes to nearest power of 2

v2: use a new variable for aligned size
    add comment
    make both vars const
    only use the aligned value in argument constructors
    fix comment typo

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
clover: Add clEnqueue{Marker, Barrier}WithWaitList.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
clover: Stub implementation of CL 1.2 sub-devices.

The implementation is basically a NOP but it conforms with OpenCL 1.2.

[ Francisco Jerez: Initialize property return buffer for
  CL_DEVICE_PARTITION_PROPERTIES, CL_DEVICE_PARTITION_TYPE,
  CL_DEVICE_PARTITION_AFFINITY_DOMAIN, and make the latter a scalar
  rather than a vector.  Some clean-up and code style fixes. ]

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
i965: Fix a few base addresses on Broadwell.

We intended to set these 64-bit addresses to 0, and set the enable bit.
But, I accidentally placed the DWord with the high bits first, when it
should have been second.

This generally worked out, by luck - presumably General State Base
Address is initially zero, and ends up remaining that way in our
contexts since we bungled the "modify enable" bit.

v2: Fix MOCS shift on GSBA.  It should be 4, and I had 2.
    (Caught by Ben Widawsky.)

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
gallium: Add PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

Bruno Jiménez:
  v2: Updated the docs
  v3: Remove trailing comma

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

Igor Gnatenko:
  v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)

Bruno Jiménez:
  v3: Convert the frequency to MHz from kHz after getting it in
  'do_winsys_init'

Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
clover: Query drivers for max clock frequency

Igor Gnatenko:

v2: PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY instead of
    PIPE_COMPUTE_MAX_CLOCK_FREQUENCY

Bruno Jiménez:

  v3: Drivers report clock in Mhz

Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
translate_sse: Use the correct buffer index in this fast path.

It is possible that there are multiple input buffers but only one is
relevant for translation. Then there will be only a single translation
group, which might need to source data from a buffer index != 0.

Fixes wrong vertex shader inputs as observed while debugging with an
application and driver combination that requires translation of a
vertex attribute in a non-trivial set of attributes and input buffers.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
gallium: add a cap for supporting 4-offset TG4 opcodes

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
mesa/st: pass 4-offset TG4 without lowering if supported

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
glsl: add lowering passes for carry/borrow

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
mesa/st: enable carry/borrow lowering pass

This handles the last of the ARB_gs5 instructions currently present in
mesa.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
w/h = 1 for rect