ARM: decompressor: *squashing updates*

ARM: Remove ARMv3 support from decompressor

      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: decompressor: avoid speculative prefetch from non-RAM areas

      We setup identity MMU mappings across the entire 4GB of space, which
      are permissionless because the domain is set to manager.

      This unfortunately allows ARMv6 and later CPUs to speculatively
      prefetch from the entire address space, which can cause undesirable
      side effects if those regions contain devices.

      As we setup the mappings with read/write permission, we can switch
      the domain to client mode, and then use the XN bit for ARMv6 and
      above to control speculative prefetch to non-RAM areas.

      Reported-by: R Sricharan <r.sricharan@ti.com>
      Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores

      When enabling the MMU for ARMv7 CPUs, the decompressor does not touch
      the ttbcr register, assuming that it will be zeroed (N == 0, EAE == 0).
      Given that only EAE is defined as 0 for non-secure copies of the
      register (and a bootloader such as kexec may leave it set to 1 anyway),
      we should ensure that we reset the register ourselves before turning on
      the MMU.

      This patch zeroes TTBCR.EAE and TTBCR.N prior to enabling the MMU for
      ARMv7 cores in the decompressor, configuring us exclusively for 32-bit
      translation tables via TTBR0.

      Cc: <stable@vger.kernel.org>
      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Matthew Leach <matthew.leach@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7492/1: add strstr declaration for decompressors

      With the generic unaligned.h, more kernel headers get pulled in including
      dynamic_debug.h which needs strstr. As it is not really used, we only need
      a declaration here.

      Signed-off-by: Rob Herring <rob.herring@calxeda.com>
      Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Reviewed-by: Arnd Bergmann <arnd@arndb.de>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7532/1: decompressor: reset SCTLR.TRE for VMSA ARMv7 cores

      This patch zeroes the SCTLR.TRE bit prior to setting the mapping as
      cacheable for ARMv7 cores in the decompressor, ensuring that the
      memory region attributes are obtained from the C and B bits, not from
      the page tables.

      Cc: Nicolas Pitre <nico@fluxnic.net>
      Reviewed-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Matthew Leach <matthew.leach@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Cc: <stable@vger.kernel.org>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7666/1: decompressor: add -mno-single-pic-base for building the decompressor

      Before jumping to (position independent) C-code from the decompressor's
      assembler world we set-up the C environment. This setup currently does not
      set r9, which for arm-none-uclinux-uclibceabi toolchains is by default
      expected to be the PIC offset base register (IE should point to the
      beginning of the GOT).

      Currently, therefore, in order to build working kernels that use the
      decompressor it is necessary to use an arm-linux-gnueabi toolchain, or
      similar. uClinux toolchains cause a prefetch abort to occur at the beginning
      of the decompress_kernel function.

      This patch allows uClinux toolchains to build bootable zImages by forcing
      the -mno-single-pic-base option, which ensures that the location of the GOT
      is re-derived each time it is required, and r9 becomes free for use as a
      general purpose register.

      This has a small (4% in instruction terms) advantage over the alternative of
      setting r9 to point to the GOT before calling into the C-world.

      Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table

      The previous mask values for the legacy ARM CPU IDs were conflicting
      with the CPU ID assignments for late-generation CPUs (like the
      Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change
      corrects the legacy ARM CPU ID value so that the jump table can
      fall-through to the appropriate cache maintenance / MMU functions.

      Signed-off-by: Marc C <marc.ceeeee@gmail.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7751/1: zImage: don't overwrite ourself with a page table

      When zImage is loaded into RAM at a low address but TEXT_OFFSET
      is set higher, we risk overwriting ourself with the page table
      needed to turn on the cache as it is located relative to the relocation
      address.  Let's defer the cache setup after relocation in that case.

      Signed-off-by: Nicolas Pitre <nico@linaro.org>
      Reported-by: Stephen Boyd <sboyd@codeurora.org>
      Tested-by: Stephen Boyd <sboyd@codeurora.org>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7770/1: remove residual ARMv2 support from decompressor

      arm26 support in Linux is long gone, yet it left an interresting,
      fossilized trace in the decompressor.

      Remove it so people won't get confused about what teqp is actually
      doing here...

      Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7877/1: use built-in byte swap function

      Enable the compiler intrinsic for byte swapping on arch ARM. This
      allows the compiler to detect and be able to optimize out byte
      swappings, and has a very modest benefit on vmlinux size (Linaro gcc
      4.8):

      text data bss dec hex filename
      2840310 123932 61960 3026202 2e2d1a vmlinux-lart #orig
      2840152 123932 61960 3026044 2e2c7c vmlinux-lart #builtin-bswap

      6473120 314840 5616016 12403976 bd4508 vmlinux-mxs #orig
      6472586 314848 5616016 12403450 bd42fa vmlinux-mxs #builtin-bswap

      7419872 318372 379556 8117800 7bde28 vmlinux-imx_v6_v7 #orig
      7419170 318364 379556 8117090 7bdb62 vmlinux-imx_v6_v7 #builtin-bswap

      Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
      Reviewed-by: Nicolas Pitre <nico@linaro.org>
      Acked-by: David Woodhouse <David.Woodhouse@intel.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7992/1: boot: compressed: ignore bswapsdi2.S

      Commit 017f161a55b4 (ARM: 7877/1: use built-in byte swap function) added
      bswapsdi2.{o,S} to arch/arm/boot/compressed/Makefile, but didn't update
      the .gitignore. Thus after a a build git status shows bswapsdi2.S as a
      new file, which is a little annoying.

      This patch updates arch/arm/boot/compressed/.gitignore to ignore
      bswapsdi2.S, as we already do for ashldi3.S and others.

      Signed-off-by: Mark Rutland <mark.rutland@arm.com>
      Acked-by: Nicolas Pitre <nico@linaro.org>
      Acked-by: Kim Phillips <kim.phillips@freescale.com>
      Cc: David Woodhouse <David.Woodhouse@intel.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

byteorder: allow arch to opt to use GCC intrinsics for byteswapping

      Since GCC 4.4, there have been __builtin_bswap32() and __builtin_bswap16()
      intrinsics. A __builtin_bswap16() came a little later (4.6 for PowerPC,
      48 for other platforms).

      By using these instead of the inline assembler that most architectures
      have in their __arch_swabXX() macros, we let the compiler see what's
      actually happening. The resulting code should be at least as good, and
      much *better* in the cases where it can be combined with a nearby load
      or store, using a load-and-byteswap or store-and-byteswap instruction
      (e.g. lwbrx/stwbrx on PowerPC, movbe on Atom).

      When GCC is sufficiently recent *and* the architecture opts in to using
      the intrinsics by setting CONFIG_ARCH_USE_BUILTIN_BSWAP, they will be
      used in preference to the __arch_swabXX() macros. An architecture which
      does not set ARCH_USE_BUILTIN_BSWAP will continue to use its own
      hand-crafted macros.

      Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
      Acked-by: H. Peter Anvin <hpa@linux.intel.com>

ARM: 7583/1: decompressor: Enable unaligned memory access for v6 and above

	Modern GCC can generate code which makes use of the CPU's native
	unaligned memory access capabilities.  This is useful for the C
	decompressor implementations used for unpacking compressed kernels.

	This patch disables alignment faults and enables the v6 unaligned
	access model on CPUs which support these features (i.e., v6 and
	later), allowing full unaligned access support for C code in the
	decompressor.

	The decompressor C code must not be built to assume that unaligned
	access works if support for v5 or older platforms is included in
	the kernel.

	For correct code generation, C decompressor code must always use
	the get_unaligned and put_unaligned accessors when dealing with
	unaligned pointers, regardless of this patch.

	Signed-off-by: Dave Martin <dave.martin@linaro.org>
	Acked-by: Nicolas Pitre <nico@linaro.org>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: moddingg33k <moddingg33k@t-online.de>
ARM: switch to 'hardware implemented' unaligned access

This should enhance hardware's performance.

Signed-off-by: moddingg33k <moddingg33k@t-online.de>

---------------------------------------------------------------------

ARM: use general unaligned.h
	Signed-off-by: moddingg33k <moddingg33k@t-online.de>

asm-generic: allow generic unaligned access if the arch supports it
	Switch the default unaligned access method to 'hardware implemented'
	if HAVE_EFFICIENT_UNALIGNED_ACCESS is set.

	Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
	Acked-by: Arnd Bergmann <arnd@arndb.de>

ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs
	DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
	comparisons in the vfs layer.

	This patch implements support for load_unaligned_zeropad for ARM CPUs
	with native support for unaligned memory accesses (v6+) when running
	little-endian.

	Reviewed-by: Nicolas Pitre <nico@linaro.org>
	Signed-off-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7449/1: use generic strnlen_user and strncpy_from_user functions
	This patch implements the word-at-a-time interface for ARM using the
	same algorithm as x86. We use the fls macro from ARMv5 onwards, where
	we have a clz instruction available which saves us a mov instruction
	when targetting Thumb-2. For older CPUs, we use the magic 0x0ff0001
	constant. Big-endian configurations make use of the implementation from
	asm-generic.

	With this implemented, we can replace our byte-at-a-time strnlen_user
	and strncpy_from_user functions with the optimised generic versions.

	Reviewed-by: Nicolas Pitre <nico@linaro.org>
	Signed-off-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

lib: add generic strnlen_user() function
	This adds a new generic optimized strnlen_user() function that uses the
	<asm/word-at-a-time.h> infrastructure to portably do efficient string
	handling.

	In many ways, strnlen is much simpler than strncpy, and in particular we
	can always pre-align the words we load from memory.  That means that all
	the worries about alignment etc are a non-issue, so this one can easily
	be used on any architecture.  You obviously do have to do the
	appropriate word-at-a-time.h macros.

	Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

lib: Sparc's strncpy_from_user is generic enough, move under lib/
	To use this, an architecture simply needs to:

	1) Provide a user_addr_max() implementation via asm/uaccess.h

	2) Add "select GENERIC_STRNCPY_FROM_USER" to their arch Kcnfig

	3) Remove the existing strncpy_from_user() implementation and symbol
	   exports their architecture had.

	Signed-off-by: David S. Miller <davem@davemloft.net>
	Acked-by: David Howells <dhowells@redhat.com>

lib: Fix generic strnlen_user for 32-bit big-endian machines
	The aligned_byte_mask() definition is wrong for 32-bit big-endian
	machines: the "7-(n)" part of the definition assumes a long is 8
	bytes.  This fixes it by using BITS_PER_LONG - 8 instead of 8*7.
	Tested on 32-bit and 64-bit PowerPC.

	Signed-off-by: Paul Mackerras <paulus@samba.org>
	Acked-by: David S. Miller <davem@davemloft.net>
	Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>