arch: arm: lib: optimize memcpy for cortex-A15

The LDRD/STRD instruction is faster than LDM/STM on Cortex-A15.
Also optimized preload cache size for Cortex-A15.

Added USE_LDRDSTRD_OVER_LDMSTM to turn on LDRD/STRD optimization.
Added ARM_PLD_SIZE, default 32. Should set to 64 for Cortex-A15.

Bug 1185248

Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Chet Kener <Cl3Kener@gmail.com>
buck build scripts and defconfig updates
msm: memutils: memcpy, memmove, copy_page optimization: Preload farther to take advantage of the memory bus, and assume
64-byte cache lines.  Unroll some pairs of ldm/stm as well, for
unexplainable reasons.

Conflicts:
	arch/arm/configs/m8_defconfig
	arch/arm/lib/Makefile
	arch/arm/mach-msm/Kconfig
O3 optimization
neon compiler directives #2

Conflicts:
	Makefile
compiler optimisation -O3
neon-vfp4 and -O2 level for compiller

Conflicts:
	arch/arm/mvp/commkm/Kbuild
	arch/arm/mvp/mvpkm/Kbuild
	arch/arm/mvp/pvtcpkm/Kbuild
	drivers/gpu/ion/Makefile
	drivers/gpu/ion/msm/Makefile
	drivers/gpu/msm/Makefile
fix incompatible soft and hard gcc options

Conflicts:
	arch/arm/mvp/mvpkm/Kbuild