clk: rockchip: move rk3288 armclk to the new cpuclk type

This moves the armclk of rk3288 to the newly created cpuclk type
and also adds the necessary per frequency-divider values for the tightly
coupled clocks. Final measurements are not completed so the optimal
divider values might change in the future.

Change-Id: Id813f6cc04b76778bc220ea431feb20a4c7aec09
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
clk: rockchip: move rk3066 and rk3188 armclk to the new cpuclk type

This moves the armclk of rk3066 and rk3188 to the newly created cpuclk type
and also adds the necessary per frequency-divider values for the tightly
coupled clocks.

Change-Id: I2e9edc501f19cf7fe025e79d7defd86f41d51724
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
clk: rockchip: add a cpuclk clock type to handle frequency transistions

Similarly to Exynos platforms, the ARMCLK on Rockchip platforms also supplies
some tightly bound clocks which need to honor special frequency requirements.

Additionally to prevent perforance drops, the ARMCLK should be supplied by an
alternative parent instead of dropping down to the 24MHz PLL bypass on changes
to the underlying APLL.

Therefore implement a special cpu-type similar to the Exynos equivalent from
Thomas Abraham which handles the parent switch using clock notifiers and
also sets the tightly bound dividers according to the changed frequency.

Change-Id: I98aaf3d8c2f86f476fc32211b70c7aa5808c3bf8
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
ARM: dts: change the arm clk to ARMCLK with heiko'patch

Change-Id: Ib58c5a373c5a8601b915c3c2a34f1afef6646936