Implement: orr_{8h,4h}_imm8_shifted, orr_{4s,2s}_imm8_shifted,
bic_{8h,4h}_imm8_shifted, bic_{4s,2s}_imm8_shifted, cls_std6_std6,
cm{eq,ge,gt,hi,hs,tst}_d_d_d, cm{ge,gt,le,lt}_d_d_zero,
cnt_{16,8}b_{16,8}b



git-svn-id: svn://svn.valgrind.org/vex@2879 8f6e269a-dfd6-0310-a8e1-e2731360e62c
Implement: dup_{d_d[], s_s[], h_h[], b_b[]}, ext


git-svn-id: svn://svn.valgrind.org/vex@2880 8f6e269a-dfd6-0310-a8e1-e2731360e62c
Increase the number of vector registers available for allocation from
3 to 5.


git-svn-id: svn://svn.valgrind.org/vex@2881 8f6e269a-dfd6-0310-a8e1-e2731360e62c
Fix an enum type confusion, PPCAvFpOp vs PPCAvOp, as excellently
detected by Clang.  Gcc, are you paying attention?


git-svn-id: svn://svn.valgrind.org/vex@2882 8f6e269a-dfd6-0310-a8e1-e2731360e62c