ARM64: remove unneeded InstPrinter hacks

Now that TableGen handles aliases, these are unneeded. Hopefully more will be
able to go soon.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208781 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][mips64r6] Add sel.s and sel.d

Summary:
Also use named constants for common opcode fields.

Depends on D3669

Reviewers: vmedic, zoran.jovanovic, jkolek

Reviewed By: jkolek

Differential Revision: http://reviews.llvm.org/D3670

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208784 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Test that IAS for -mcpu=mips5 does not accept MIPS64 insns and -mcpu=mips(5|64) does not accept MIPS64r2

Summary:
To limit the number of tests required, only one 64-bit ISA prior to MIPS64 are tested.

rdhwr has been deliberately left without an ISA annotation for now. This is
because the assembler and CodeGen disagree on when the instruction is
available. Strictly speaking, it is only available in MIPS32r2 and
MIPS64r2. However, it is emulated by a kernel trap on earlier ISA's and is
necessary for TLS so CodeGen should emit it on older ISA's too.

Depends on D3697

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3698

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208785 91177308-0d34-0410-b5e6-96231b3b80d8
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test.

For example
	tzcntl	%edi, %ebx
	testl %edi, %edi
	je	.label

can be rewritten into
	tzcntl	%edi, %ebx
	jb 	.label

A minor complication is that tzcnt sets CF instead of ZF when the input
is zero, we have to rewrite users of the flags from ZF to CF. Currently
we recognize patterns using lzcnt, tzcnt and popcnt.

Differential Revision: http://reviews.llvm.org/D3454

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208788 91177308-0d34-0410-b5e6-96231b3b80d8
More test case for r208715.

The commit r208166 will cause some regression on ARM EHABI.
This fix has been committed in r208715, and an assertion failure
test case has been committed in r208770.

This commit further extends the unittest so that the actual
value in the handlerdata will be checked.


git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208790 91177308-0d34-0410-b5e6-96231b3b80d8
Fix ARM EHABI when function has landingpad and nounwind.

If the function has the landingpad instruction, then the
handlerdata should be emitted even if the function has
nouwnind attribute.  Otherwise, following code will not
work:

    void test1() noexcept {
      try {
        throw_exception();
      } catch (...) {
        log_unexpected_exception();
      }
    }

Since the cantunwind was incorrectly emitted and the
LSDA is not available.


git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208791 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64-BE] Fix byte order of CIE and FDE frames for exception handling

Reviewed at http://reviews.llvm.org/D3741



git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208792 91177308-0d34-0410-b5e6-96231b3b80d8
ARM-BE: test files for vector argument passing

Reviewed at http://reviews.llvm.org/D3766



git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208793 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Do not delay attaching DW_AT_inline attribute to abstract definitions.

This is just unneccessary - we only create abstract definitions when
we're inlining anyway, so there's no reason to delay this to see if
we're going to inline anything.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208798 91177308-0d34-0410-b5e6-96231b3b80d8
InstSimplify: Optimize signed icmp of -(zext V)

Summary:
We know that -(zext V) will always be <= zero, simplify signed icmps
that have these.

Uncovered using http://www.cs.utah.edu/~regehr/souper/

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3754

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208809 91177308-0d34-0410-b5e6-96231b3b80d8
Rename ComputeMaskedBits to computeKnownBits. "Masked" has been
inappropriate since it lost its Mask parameter in r154011.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208811 91177308-0d34-0410-b5e6-96231b3b80d8
Teach llvm-nm to know about fat archives (aka MachOUniversal files
containing archives).  First step as other tools will be updated next.


git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208812 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Assert that a CU's subprogram list contains only subprograms.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208816 91177308-0d34-0410-b5e6-96231b3b80d8
DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.

Many old tests using prior schemas still had some brokenness here (both
indirect arrays and arrays with single bogus elements). Fixed those up
so they don't hit the new assertions.

Also reduced nesting in some places, etc.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208817 91177308-0d34-0410-b5e6-96231b3b80d8
DwarfDebug: Don't set frame index locations on abstract variables.

Abstract variables should never have/use locations. In this case the
data wasn't used, so no functional change intended here, just
simplification.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208820 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Optimize -x s< cst

Summary:
This gets rid of a sub instruction by moving the negation to the
constant when valid.

Reviewers: nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3773

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208827 91177308-0d34-0410-b5e6-96231b3b80d8
Move the TargetMachine MC options to MCTargetOptions. No functional
change.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208832 91177308-0d34-0410-b5e6-96231b3b80d8
Unify command line handling of MCTargetOptions and remove extra
options and code. No functional change.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208833 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused functions setting MCOptions from TargetMachine.

git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208835 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Support aggressive fastcc/tailcallopt breaking ABI by popping out argument stack from callee.



git-svn-id: http://llvm.org/svn/llvm-project/llvm/trunk@208837 91177308-0d34-0410-b5e6-96231b3b80d8