ramfs_ge5: move to my centralized ramdisks folder
block: Switch from BFQ-v7r6 for 3.4.0 to BFQ-v7r7 for 3.4.0

. BUGFIX: Prevent the OOM queue from being involved in the queue
cooperation mechanism. In fact, since the requests temporarily
redirected to the OOM queue could be redirected again to dedicated
queues at any time, the state needed to correctly handle merging
with the OOM queue would be quite complex and expensive to
maintain. Besides, in such a critical condition as an out of
memory, the benefits of queue merging may be little relevant, or
even negligible.

. IMPROVEMENT: Let the OOM queue be initialized only once. Previously,
the OOM queue was reinitialized, at each request enqueue, with the
parameters related to the process that issued that request.
Depending on the parameters of the processes doing I/O, this could
easily cause the OOM queue to be moved continuously across service
trees, or even across groups. It also caused the parameters of the
OOM queue to be continuously reset in any case.

. CODE IMPROVEMENT. Performed some minor code cleanups, and added some
BUG_ON()s that, if the weight of an entity becomes inconsistent,
should better help understand why.

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
buildenv
update msm video driver
android binder u32->u64
msm_rq_stats changes
cpufreq: Introduce new relation for freq selection

Introduce CPUFREQ_RELATION_C for frequency selection.
It selects the frequency with the minimum euclidean distance to target.
In case of equal distance between 2 frequencies, it will select the
greater frequency.

Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
cpufreq_ondemand: use the new freq relation
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+

ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls.  Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).

We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.

Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code.  This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.

Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
staging: binder: Change binder mutex to rtmutex

Surfaceflinger uses binder heavily to receive/send frames from
applications
while compositing the screen. Change the binder mutex to an rt mutex to
minimize
instances where high priority surfaceflinger binder work is blocked by
lower
priority binder ipc.

Signed-off-by: Riley Andrews <riandrews@google.com>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
buildenv
Version 1.2.5