MIPS64: Add atomic_ops
MIPS64: basic build support for MIPS hardware.

This defines two new environment variables in addition to the usual
v8 CC, CXX, AR, etc. These are LDSO_PATH, and LD_R_PATH. See the
wiki page for 64-bit building for complete details.

This is a TEMPORARY workaround for non-existent or incomplete
64-bit support in the userland of the mips64 dev boards I have
used. These can point to non-standard paths, such as libraries
provided by toolchain.

These MUST point to a path that exists on the target board at
runtime:

LDSO_PATH: path to dynamic loader, typically: "/lib64/ld.so.1"
LD_R_PATH: colon separated lib paths, typically: "/lib64:/usr/lib64"
MIPS64: Fix string compare when cpu  can't read unaligned.
MIPS64: Abi changes for n64.

Our early work took a shortcut of staying with the O32
Abi when using the simulator. This change fixes that and
moves to n64 Abi for gnerated code and the simulator.

This is controlled by "#define MIPS_ABI_N64 1" in
constants-mips64.h.

This can be changed to MIPS_ABI_O32, and the simulator will
still work OK [1]. This may seem like a useless feature, but
can be an example for how we can start migrating towards
supporting with 32-bit and 64-bit code in the same codebase.
(There's a LOT more effort to make this actually work, this
is just a starting point).

TODO: n64 does not use argument slots. This code sets
kCArgSlotCount to 0, but does NOT remove many places that
add/sub kCArgsSlotsSize to sp. So we take a performance hit
currently and that must be fixed.

[1] O32 on sim was tested a couple days ago. I will
commit this now, and test tomorrow.
MIPS64: Reorder mthc1/mtc1 to prevent FP register trashing.

An mtc1 in FR=1 mode on mips64 hardware will trash the upper 32-bits
(zero-write) of the destination fpr.

So when using both mtc1 and mthc1, the mtc1 must be used before the
mfhc1.

The manual confirms this behavior:  "The low word in GPR rt is
placed into the low word of FPR fs. If FPRs are 64 bits wide,
bits 63..32 of FPR fs become UNPREDICTABLE."

This bug was not seen on simulator. So I have also fixed the sim
to model this behavior, and verfied that this bug now shows on
the sim (prior to this fix).

TEST=mjsunit/smi-ops.js and about 40 others.
MIPS64: Add missing TODO on use of li CONSTANT_SIZE.
MIPS64: Fix wrong activiation of trace-sim with high instr counts.

Change sim icount_ to int64_t to prevent rollover, which incorrectly
activated trace-sim mode, due to trace-sim-at flag being 0 when
unused.

Leave FLAG_trace_sim_at as 'int' for now, and just cast to int64_t.
My use cases have never needed a trace-sim count greater than 2
billion instuctions.

Changing FLAG_trace_sim_at to int64 would require adding new
flag types in flag-definitions, and possibly new command-line
parsing code. It's only worth doing if we actually need it.

BUG=gh-77
TEST=v8 benchmarks
MIPS64: Fix accessor calls in simulator.

TEST = accessors tests in cctest
BUG =

(cherry picked from commit 2254f7df6d2f619951ca6f9d38daf7d74eccbeb6)
MIPS64: Fix LoadRegPlusOffsetToAt() and kInterruptLimit.