Add SPI interface to register banks.

Interface intergration and registerbank changes not currently varified.
Correct output port type.
Make idle frames identifiable.

This commit ensures that idle frames are distinguisable from data frames (both
start with a comma!) by adding an extra kcharacter.

Additionally, this change ensures that the idle character causes the CRC
generator to get reset ready for whatever follows.
Zero pad idle sentinel registers.
Add placeholder SPI pin constraints.
Explicitly truncate written idle sentinels.
Fix SPI address range.
Default to front ports for B2B without chipscope.
Added pinout for SPI.
Increase register bank address width.
Fix address widths and make reg_bank address decode combinatorial.
Make register base addresses 16-bits.
Update documentation with SPI address details.
Merge pull request #17 from SpiNNakerManchester/spi

Add SPI interface to SpiNNaker FPGAs for BMP-driven debug.