Add the string terminator for binary bitstrings.
Convert string to bitstring in SigVarBase
constructor if applicable (vhdlpp).
vhdlpp: Basic support for unbounded array types.

Once a signal/variable of unbounded array type becomes limited in its size, it
is emitted as a packed array. Therefore currently it works only for
bit/logic/reg/wire types.
vhdlpp: Aggregate expression are elaborated if
they are used for Signal/Variable initalization.
libmisc: Added empty_perm_string.
vhdlpp: Added 'packed' property for VTypes.

It detetermines if a type can be used as the base type of a packed array.
vhdlpp: Type of an array is selected depending on the element type.
vhdlpp: Turn on the reg_flag for types that cannot be packed.
vhdlpp: Invert range in ExpAggregate when necessary.
vhdlpp: 'integer' is emitted as 'integer' instead of 'bool [31:0]'.
Removed ExpReal::evaluate().Its signature does not match the one meant to be overridden.
Add message that L-value concatenation is not supported in synthesis
Do a better job with synthesis translate pragmas.
Fix for GitHub issue #33 - Problem with multi-dimensional arrays.

normalize_variable_unpacked() was not correctly calculating the
minimum expression width required to calculate the canonical
index.
Require a space between the synthesis and translate_* key words
vhdlpp: "integer" is emitted as "bool[31:0" but is marked as accepted to be used in packed arrays.
vhdlpp: VTypeRecord is marked as acceptable in packed arrays. VTypeDef is accepted depending on the base type.
vhdlpp: Added VType::emit_name() that skips emission of a name if it is empty (otherwise '\' is outputted).
vhdlpp: Minor cleaning, fixed copyright notices.
Merge pull request #38 from orsonmmz/unbounded_array

Support for VHDL unbounded arrays.