cubieboard: Initialize memory in bootblock

Even though the Allwinner A10 is limited to a 24KiB bootblock, the
memory initialization takes only about 3KiB and leaves enough room for
an MMC or NAND driver, so init the memory early on. The advantage is
that we can eliminate complicated logistics of where to cache CBFS and
where to load the ramstage in SRAM.

Change-Id: Id549552ed509434e831db60deaef28e04d62417f
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4630
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
cpu/allwinner/a10: Add low-level helpers for DRAM clock control

PLL5 is special in that it controls the DRAM clock, and requires a
fine-grained low-level control which will be needed by raminit code.
This change also brings functionality which will be needed by
raminit.

Change-Id: I25ecc91aa2154e504ceebb9003a5e5728d47f4a3
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4593
Tested-by: build bot (Jenkins)
cpu/allwinner/a10: Import raminit code from uboot

The memory initialization code is a work in progress for uboot, so we
only import the bits needed to get RAM up and running. Any refactoring
is cosmetic, and any functional refactoring should be done in separate
patches, and preferably, in coordination with the sunxi team.
Since it's not yet determined if we should initialize memory during
the bootblock or romstage, we don't add raminit to the build just yet.

Change-Id: I2ec1821942c6970150a02fa3806a257da649e1c9
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/4597
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
drivers: Add support for X-Powers AXP209 PMU

Change-Id: I1de0e656a38527b172af1d0b5bcd97acbfc03bf0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[RFC] drivers: Import generic MMC handler from uboot

Aye and behold, the wonderful world of MMC and SD cards.
This is the MMC handler imported from uboot and adjusted for coreboot
use. There are over 100 micro-commits to refactor and clean up the
ubootian style, so there is no sense in saying what uboot revision
this came from (yeah, Paul, I'm looking at you).

Let's be honest. This code is a clusterfuck in a coreboot-flavored
candy coating. There's probably so much more work to do, that I didn't
bother cleaning up the comments. I need a general direction on this.
How do we even start bringing this up to coreboot standards? We'll
need this for the Allwinner ports.

There's also the SoC specific MMC driver, but that one is not included
here. I want to get a perspective from someone who's never had to
endure the pains of uboot code.

Change-Id: Ied5ac5701d2fe8338fd92477110d6f74a4295371
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
lib/hexdump: Take void * and size_t as arguments

Representing a memory location as an unsigned long is specific to
32-bit architectures. It also doesn't make sense to represent a length
assumed to be positive as a signed integer. With this change, it is no
longer necessary to cast a pointer to unsigned long when passing it to
hexdump.

Change-Id: I641777d940ceac6f37c363051f1e9c1b3ec3ed95
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
NFM cpu: Import sunxi MMC driver from uboot

Change-Id: I8417875737a5f8e1dc21325ad5d6d245423f68cb
NFM cpu: Add clock reg definitions for SD clock

Change-Id: I88763072c8a541ddba794e79fb55e82eb2f187a9
cubieboard: add basic SD init and testing

Change-Id: I63302b87b583ed62794559238b8b1ae19aba3f81
NFM cpu: use SD card for bootblock media

Change-Id: Ie0b123023c53e485c41650c1fc7b0fb69a286a30
cpu/allwinner/a10: make entire ROM image bootable

Change-Id: Ifb4ac7b1682462ccbf590f41b2357b113da1d2d5
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
CPU: Kconfig, Clarify positioning of keep ROMSTAGE and RAMSTAGE

Change-Id: I4ca9ad097b145445316bcd962e007731b08a7fda
CPU: bootblock_media, cache entire rom to RAM

Change-Id: I6ec78ae2b173d054a80584315bd2698c618f5b89
board: load ramstage in romstage

Change-Id: I828b7e019b6d66cf99ca039844be50f9f50bdb7d
CPU: Add first ramstage bits

Change-Id: I857755976b17b0e492c086162f395a77933eeed8
KILLME fucking hack

Change-Id: I4a20a0d85621cbd4adc73401f064bc610ae5cb53
cpu: mmc: add a makefile include shit

Change-Id: I8d7171fefdade16ba20302ea177ac97319ec70ec
MMC: move comments to C file

Change-Id: I87c0ef1411b1cca4f26571fed739a1858b1fae10