ARM: sun7i: Add ARM PMU in A20 DTSI

Enable the performance monitoring unit found in the A20 SoCs.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun6i: Add ARM PMU in A31 DTSI

Enable the performance monitoring unit found in the A20 SoCs.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun7i: Fix i2c4 base address

For some reason, the base address of the fifth I2C adapter in the A20 was
incorrect. Change this to the actual base address.

Reported-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun7i: fix PLL4 clock and add PLL8

Allwinner reworked the PLL4 clock in sun7i; so we need to change the
compatible. Additionally, PLL8 is compatible with this new PLL4
implementation, so let's add a node for it as well.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mfd: AXP20x: Add mfd driver for AXP20x PMIC

This patch introduces the preliminary support for PMICs X-Powers AXP202
and AXP209. The AXP209 and AXP202 are the PMUs (Power Management Unit)
used by A10, A13 and A20 SoCs and developed by X-Powers, a sister company
of Allwinner.

The core enables support for two subsystems:
- PEK (Power Enable Key)
- Regulators

Signed-off-by: Carlo Caione <carlo@caione.org>
mfd: AXP20x: Add bindings documentation

Bindings documentation for the AXP20x driver. In this file also
sub-nodes are documented.

Signed-off-by: Carlo Caione <carlo@caione.org>
input: misc: Add driver for AXP20x Power Enable Key

This patch add support for the Power Enable Key found on MFD AXP202 and
AXP209. Besides the basic support for the button, the driver adds two
entries in sysfs to configure the time delay for power on/off.

Signed-off-by: Carlo Caione <carlo@caione.org>
input: misc: Add ABI docs for AXP20x PEK

Add ABI entries for the PEK found on PMU X-Powers AXP202 and AXP209.

Signed-off-by: Carlo Caione <carlo@caione.org>
regulator: AXP20x: Add support for regulators subsystem

AXP202 and AXP209 come with two synchronous step-down DC-DCs and five
LDOs. This patch introduces basic support for those regulators.

Signed-off-by: Carlo Caione <carlo@caione.org>
ARM: sun7i/sun4i: dt: Add AXP209 support to various boards

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Carlo Caione <carlo@caione.org>
reset: Add of_reset_control_get to reset.h

of_reset_control_get is not declared static in drivers/reset/core.c, which
is correct as we want to use it elsewhere too. But it does not have a
protype declared anywhere under include/linux. Add a prototype / stub for it
to linux/reset.h to fix this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
clocksource: sun5i: Add support for reset controller

The Allwinner A31 that uses this timer has the timer IP asserted in reset.
Add an optional reset property to the DT, and deassert the timer from reset if
it's there.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun6i: a31: Add support for the High Speed Timers

The Allwinner A31 has support for four high speed timers. Apart for the
number of timers (4 vs 2), it's basically the same logic than the high
speed timers found in the sun5i chips.

Now that we have a driver to support it, we can enable them in the
device tree.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
clk: sunxi: Remove calls to clk_put

Callers of clk_put must disable the clock first. This also means that as long
as the clock is enabled the driver should hold a reference to that clock.
Hence, the call to clk_put here are bogus and should be removed.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun4i: dt: Add pin muxing options for SPI

These are based on the available SPI configurations of Cubieboard,
Olimex LIME, and PcDuino. There is no pin group for SPI3, as all the
boards seem to use those pins for EMAC.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
ARM: sun4i: dt: cubieboard: Enable SPI0

Only SPI0 is enabled, as the schematic denotes it as the only SPI bus,
while other pins are reserved for different peripherals.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
ARM: dts: sun7i: Cubietruck wifi OOB irq support wip

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
brcmfmac: Fix brcmf_chip_ai_coredisable not applying reset bits to BCMA_IOCTL

brcmfmac has been broken on my cubietruck with a BCM43362:

brcmfmac: brcmf_chip_recognition: found AXI chip: BCM43362, rev=1
brcmfmac: brcmf_c_preinit_dcmds: Firmware version = wl0:
        Apr 22 2013 14:50:00 version 5.90.195.89.6 FWID 01-b30a427d

since commit 53036261033: "brcmfmac: update core reset and disable routines".

The problem is that since this commit brcmf_chip_ai_resetcore no longer sets
BCMA_IOCTL itself before bringing the core out of reset, instead relying on
brcmf_chip_ai_coredisable to do so. But brcmf_chip_ai_coredisable is a nop
of the chip is already in reset. This patch modifies brcmf_chip_ai_coredisable
to always set BCMA_IOCTL even if the core is already in reset.

This fixes brcmfmac hanging in firmware loading on my board.

Cc: stable@vger.kernel.org # v3.14
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Arend van Spriel <arend@broadcom.com>