target-arm: A64: Add last AdvSIMD Integer to FP ops

This adds the remaining [US]CVTF operations to the SIMD
shift-immediate, two-reg-misc and scalar-two-reg-misc
groups of opcodes.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[PMM: added scalar 2-misc encodings]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Add FSQRT to C3.6.17 (two misc)

Implement FSQRT in the two-reg-misc category.
GCC uses this instruction form.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Add remaining CLS/Z vector ops

Implement the CLS, CLZ operations in the 2-reg-misc category.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Saturating and narrowing shift ops

This implements a the remaining [US][R]SHR[R][2] opcodes which are
saturating and narrowing shift right operations. These are used in
things like libav. Note signed shifts can have an "unsigned" saturating
narrow operation which will floor negative values.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP

Implement the SADDLP, UADDLP, SADALP and UADALP instructions
in the SIMD 2-reg misc category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Implement SHLL, SHLL2

Implement the SHLL and SHLL2 instructions from the 2-reg-misc
category.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm: A64: Add FRECPX (reciprocal exponent)

These are fairly simple exponent only estimation functions using helpers.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Conflicts:
	target-arm/helper-a64.c
	target-arm/helper-a64.h
	target-arm/translate-a64.c
softfloat: export squash_input_denormal functions

I need these available outside of softfloat for some of the reciprocal
processing in aarch64 helper functions.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
target-arm: A64: Implement AdvSIMD reciprocal ops

The actual reciprocal function is shared with the NEON code. The include
URECPE and FRECPE instructions in both scalar and vector forms.
However the v8 wrappers have to deal with a wider range input conditions
as well as FPCR controlled behaviour for squashing NaNs and de-normals.
I also switched the existing NEON code to just take fpst as needed.
translate-a64.c: add a debug helper trace macro

This just makes it easier to drop TRACE_DECODE statements all over the
place instead of fprintfs.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---

v2 (ajb)
   - checkpatch.pl fixes
qemu-log: support simple pid substitution in logfile

When debugging stuff that occurs over several forks it would be useful
not to keep overwriting the one logfile you've set-up. This allows a
simple %d to be included once in the logfile parameter which is
substituted with getpid().
rm unused field
scripts/qemu-binfmt-conf.sh: re-factor and clean-up

I was looking to set-up for development but found the script made some
hard-coded assumptions. It doesn't seem the script is used by the
distros but if it had a little more love maybe it would be ;-)

* Add usage() instructions
* Move all registering to a single function
* Check for existence of executable qemu before registering
* Add -d (devel) mode for subscribing in-src tree binaries
* error handling when setting binfmt fails
* add support for aarch64
scripts/qemu-binfmt-check.py: a binfmt checker

This script allows you to check if a given binary will match against any
of the currently registered binfmts on the system.

---

v2 (ajb):
   - cleaned up whitespace and checkpatch fixes
v3 (ajb)):
   - usage() and logging clean-ups
linux-user: Implement sendmmsg syscall

Glibc when built for newer kernels assumes that the sendmmsg syscall is available.
Without it, dns resolution simply fails to work.

Wrap the syscall with existing infrastructure so that we don't have a host dependency
on sendmmsg.

Signed-off-by: Alexander Graf <agraf@suse.de>
TESTING: additional opcode information from gcc tests
tcg: add tcg_abort_dbg() for additional info
tcg: add debug helpers tcg_debug_dump_i(32|64)

The helpers are useful for debugging if you want to inspect interim
values of tcg temp variables while executing TCG generated code. This is
an alternative to tracing with logs or inspecting with GDB.

The functions do take format strings but to prevent massive memory loss
it will default to a constant string after a short number of uses.
target-arm: A64: Add FSQRTE (WIP)