fix base adresses in sam3 devices with multiple sram blocks, add nfc section
change interrupt names to be consistent with datasheet
add memory map and irq table for sam3s and sam3u devices
[GENLINK] Updated definitions of memory sizes

Updated according versions of datasheets:

STM32F030 DS9773  v1.0
STM32F031 DS10111 v1.0
STM32F050 DS9262  v1.0
STM32F051 DS8668  v4.0 (updated RAM size)
STM32F071 DS10009 v1.0
STM32F072 DS9826  v1.0

F1, F2 and F3 have no changes and no new datasheets.

STM32F401 DS9716  v2.1
STM32F401 DS10086 v1.0
STM32F405 DS8626  v4.0
STM32F415 DS8597  v4.0
STM32F427 DS9405  v3.0
STM32F439 DS9484  v4.0

STM32L151 DS6876  v9.0
STM32L152 DS8576  v6.0
STM32L152 DS8890  v6.0
STM32L162 DS8669  v4.0
STM32L162 DS8928  v5.0
STM32L100 DS9496  v1.0
STM32L100 DS9821  v1.0
[F0] Updated memorymap.h to meet RM0091 Rev. 5
[F0] Updated Uart module to be compatible wih RM0091 Rev. 5
[F0] Updated RCC module to be compatible wih RM0091 Rev. 5
[F0] Adapted USB to be compatible wih RM0091 Rev. 5
[F0] Add new peripheral Clock Recovery Subsystem  as defined in RM0091 Rev. 5
[F0] Update CRCto be compatible wih RM0091 Rev. 5
[F0] Add new irq's

Be warned that this commit changes names of some old definitions. This may broke old code !