ARM: dts: sun7i: Add arch timers

Note this requires a new enough uboot, otherwise things won't work, ie:

https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-next
or:
http://xenbits.xen.org/gitweb/?p=people/ianc/u-boot.git;a=shortlog;h=refs/heads/devel/sunxi-psci

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
clk: sunxi: Allwinner A20 output clock support

This patch adds support for the external clock outputs on the
Allwinner A20 SoC. The clock outputs are similar to "module 0"
type clocks, with different offsets and widths for clock factors.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style

Device tree naming conventions state that node names should match
the nodes function. Change external low speed oscillator node name
to match.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: external clock outputs

This commit adds the two external clock outputs available on A20 to
its device tree. A dummy fixed factor clock is also added to serve as
the first input of the clock outputs, which according to AW's A20 user
manual, is the 24MHz oscillator divided by 750.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
pinctrl: sunxi: Add Allwinner A20 clock output pin functions

This patch adds the clock output pin functions on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: dts: sun7i: Add pin muxing options for clock outputs

This patch adds the clock output pin options on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sun7i: cubietruck: Enable the i2c controllers

The Cubietruck makes use of the first three i2c controllers found on the
Allwinner A20; i2c-0 is used internally for the PMIC, i2c-1 is exposed on
the board headers, and i2c-2 is used for DDC on the VGA connector. This
patch enables them in the device tree.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

This is based on the driver Allwinner ships in the Android kernel sources.

Initial porting to upstream kernels done by David Lanzendörfer, additional
fixes and cleanups by Hans de Goede.

It uses dma in bus-master mode using a built-in designware idmac controller,
which is identical to the one found in the mmc-dw hosts.
The rest of the host is not identical to mmc-dw.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun4i: Add support for mmc

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: sun4i: dt: Add mmc node to a few more boards

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun5i: Add support for mmc

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun7i: Add support for mmc

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
mmc: sunxi: Using mmc_of_parse and mmc slot lib
Adapting the sunxi MMC host driver onto using the mmc_of_parse function
instead of manually reading out the device tree parameters with of_property_read_u32.
Also this patch replaces home brew functions by methods provided
by the generic GPIO card-detect helper
ARM: dts: sun4i: mmc: Removing change detect option
ARM: dts: sun5i: mmc: Removing change detect option
ARM: dts: sun7i: mmc: Removing change detect option
mmc: sunxi: Using generic mmc_gpio_get_ro instead of sunxi_mmc_get_ro
clk: sunxi: add clock-output-names dt property support

sunxi clock drivers use dt node name as clock name, but clock
nodes should be named clk@X, so the names would be the same.
Let the drivers read clock names from dt clock-output-names
property.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
clk: sunxi: update clock-output-names dt binding documentation

clock-output-names is now required for most of sunxi clock nodes, to
provide the name of the corresponding clock. Add the new requirements,
exceptions, as well as examples.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
clk: sunxi: add names for pll5, pll6 parent clocks to factors_data

Some factor clocks, such as the parent clock of pll5 and pll6, have
multiple output names. Add the corresponding names to factors_data
tied to compatible string.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>