net/bnx2x: Add shutdown handler

This change uses the existing .remove handler for device shutdown.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
xhci: do not halt the secondary HCD

We can't halt the secondary HCD, because it's also the primary HCD,
which will cause problems if we have devices attached to the primary
HCD, like a keyboard.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
xhci: Use xhci_pci_remove for xhci device shutdown

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
ipr: Add support for async scanning to speed up boot

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Add skiroot defconfig

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
powerpc: Add CONFIG_NET and CONFIG_DRM_AST

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
drm/ttm: move fpfn and lpfn into each placement v2

This allows us to more fine grained specify where to place the buffer object.

v2: rebased on drm-next, add bochs changes as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
drm/ast: switch to using CACHED by default for sysram

This fixes problems on ppc64 platforms, where we could end up using
a WC mapping for migrating BOs with memcpy, when really we want to
use cached memory.

Tested-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Add reduced blanking modes for wide screen mode

Signed-off-by: Egbert Eich <eich@suse.com>
Tested-by: Steven You2 Liang <liangyou2@lenovo.com>
Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com>

v3: based on [PATCH 1/2] drm/ast: Add missing entry to dclk_table[].
    Add reduced blanking modes, improve mode matching to
    identify these modes by thier sync polarities.

[airlied: argh whitespace damage]
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Try to use MMIO registers when PIO isn't supported

If the PIO resources haven't been assigned, then we have no choice
but try to use the MMIO version. This is the case for example on
POWER8 which doesn't support PIO at all.

Chips rev 0x20 or later have MMIO decoding enabled by default.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: POST chip at probe time if VGA not enabled

We need to do it on machines without a BIOS such as POWER8. Also
for detection to work without triggering PCIe errors, we need
to enable VGA early on, inside ast_detect_chip().

While touching those files, replace a few hard coded register
numbers with the corresponding symbolic constant.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()

If the P2A has been used to target other SOC registers before that
call, we're going to hit the wrong place so make sure we set the
base address up properly before using it.

(P2A stands for PCIe to AHB bridge and is the bride that allows
accessing the AST's internal AHB bus using a relocatable 64k
window in the second half of the PCIe MMIO BAR)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chips

It looks like the AST2400 comes up with the DVO enable bit set,
which causes us to incorrectly assume we have a SIL164 regardless
of the value of the scratch registers setup by the BMC firmware.

So let's limit that test to the case where the chip has already
been setup by a BIOS.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Cleanup analog init code path

Move the MMIO mangling to a separate routine and actually
disable the DVO output when using pure analog.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Fix HW cursor image

The translation from the X driver to the KMS one typo'ed a couple
of array indices, causing the HW cursor to look weird (blocky with
leaking edge colors). This fixes it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
drm/ast: Default to 8bpp on big endian

This chip is LE only (some versions support HW swappers but not
the latest and the driver doesn't anyway).

I tried using the "foreign endian" fb flag but it appears to be
busted, so instead, default to endian-neutral 8bpp for BE.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
powerpc/powernv: Add OPAL IPMI interface

Recent OPAL firmare adds a couple of functions to send and receive IPMI
messages:

  https://github.com/open-power/skiboot/commit/b2a374da

This change updates the token list and wrappers to suit, and adds the
platform devices for any IPMI interfaces.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
drivers/char/ipmi: Add powernv IPMI driver

This change adds an initial IPMI driver for powerpc OPAL firmware. The
interface is exposed entirely through firmware: we have two functions to
send and receive IPMI messages, and an interrupt notification from the
firmware to signify that a message is available.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
powerpc/skiroot_defconfig: Enable IPMI driver

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>