imx6qdl-bt.dtsi: add reference to pinctrl_usbh1
imx6qdl-insp.dtsi: add reg_usbh1_vbus
imx6qdl-per.dtsi: add reference to pinctrl_usbh1
imx6qdl-vp.dtsi: add reg_usbh1_vbus
usb: phy: mxs: change test clock gating on connection/disconnection

On some boards powered by iMX6Q rev1.0 I get non-working USB Host 1
(connected to a hub, no other devices are connected to this hub) and
repeating resets from the chipidea host driver (with ported pm support
from Freescale):

  ....
  [   25.481714] usb 2-1: reset high-speed USB device number 2 using ci_hdrc
  [   27.491716] usb 2-1: reset high-speed USB device number 2 using ci_hdrc
  [   29.501721] usb 2-1: reset high-speed USB device number 2 using ci_hdrc
  ....

As for me it seems that usb phy test clock gating may be done
incorrectly, on disconnection it is running, and on connection it is
gated, but may be it is the intention, unfortunately iMX6Q RM is not
a satisfactory source of information on the topic.

Either complete disabling of loopback for the host or inverting test
clock gating solves my problem, this change proposes to invert test
clock gating setting.

Some Rev1.2 boards also need this patch

Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
vp_defconfig: use RV4162 for rtc