DebugInfo: Partial revert r209984 due to more cases where abstract DbgVariables do not have associated DIEs.

Along with a test case to demonstrate that due to inlining order there
are cases where abstract variable DIEs are not constructed since the
abstract subprogram was built due to a previous inlining that optimized
away those variables. This produces incorrect debug info (the 'missing'
abstract variable causes the inlined instance of that variable to be
emitted with a full description (name, line, file) rather than
referencing the abstract origin), but this commit at least ensures that
it doesn't crash...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210143 91177308-0d34-0410-b5e6-96231b3b80d8
config.h: fix layering and don't duplicate definitions

Also correct the llvm-config.h header guard so it doesn't depend on 'CONFIG_H'
which is commonly defined in external projects and caused trouble for
embedders.

In future llvm/Config/llvm-config.h will be installed, but not
the private llvm/Config/config.h header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210144 91177308-0d34-0410-b5e6-96231b3b80d8
GraphWriter: support the XDG open utility

This runs a suitable viewer on Unix desktop environments specified by
Freedesktop.org (GNOME, KDE, Linux distributions etc.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210147 91177308-0d34-0410-b5e6-96231b3b80d8
GraphWriter: try gv before xdg-open

Avoid changing behaviour for everyone who's used to the traditional ghostview
UI, especially since it knows how to stay in the foreground unlike xdg-open.

Amendment to r210147.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210148 91177308-0d34-0410-b5e6-96231b3b80d8
[Object][ELF] Range-based loop simplification.

No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210164 91177308-0d34-0410-b5e6-96231b3b80d8
docs: Remove documentation for legacy PGO options

Late last year r191835 removed a largely unmaintained legacy PGO
infrastructure, but some of the docs were missed. Since these docs are
for things that don't actually exist anymore, they should be removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210165 91177308-0d34-0410-b5e6-96231b3b80d8
Move GenericScheduler and PostGenericScheduler into a header.

These were not exposed previously because I didn't want out-of-tree
targets to be too dependent on their internals. They can be reused for
a very wide variety of processors with casual scheduling needs without
exposing the classes by instead using hooks defined in
MachineSchedPolicy (we can add more if needed). When targets are more
aggressively tuned or want to provide custom heuristics, they can
define their own MachineSchedStrategy. I tend to think this is better
once you start customizing heuristics because you can copy over only
what you need. I don't think that layering heuristics generally works
well.

However, Arch64 targets now want to reuse the Generic scheduling logic
but also provide extensions. I don't see much harm in exposing the
Generic scheduling classes with a major caveat: these scheduling
strategies may change in the future without validating performance on
less mainstream processors. If you want to be immune from changes,
just define your own MachineSchedStrategy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210166 91177308-0d34-0410-b5e6-96231b3b80d8
Add a subtarget hook: enablePostMachineScheduler.

As requested by AArch64 subtargets.

Note that this will have no effect until the
AArch64 target actually enables the pass like this:
substitutePass(&PostRASchedulerID, &PostMachineSchedulerID);

As soon as armv7 switches over, PostMachineScheduler will become the
default postRA scheduler, so this won't be necessary any more.
Targets using the old postRA schedule would then do:
substitutePass(&PostMachineSchedulerID, &PostRASchedulerID);

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210167 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a use of uninitialized value. OldCC is set when IsCmpZero || IsSwapped and read when ShouldUpdateCC || IsSwapped, and ShouldUpdateCC is independent. Fixes PR19932, but no test since I wasn't able to get any symptoms to appear, not even with valgrind and the testcase from the PR. It's clear what happened from inspection of the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210168 91177308-0d34-0410-b5e6-96231b3b80d8
Fix gcc -Wparentheses warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210178 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Fix some LLVM Coding Standards violations in the load/store optimizer.

Variable names should start with an upper case letter.

No change in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210181 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] clang-format the load/store optimizer.

No change in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210182 91177308-0d34-0410-b5e6-96231b3b80d8
 InstCombine: Improvement to check if signed addition overflows.

This patch implements two things:

1. If we know one number is positive and another is negative, we return true as
    signed addition of two opposite signed numbers will never overflow.

2. Implemented TODO : If one of the operands only has one non-zero bit, and if
    the other operand has a known-zero bit in a more significant place than it
    (not including the sign bit) the ripple may go up to and fill the zero, but
    won't change the sign. e.x -  (x & ~4) + 1

We make sure that we are ignoring 0 at MSB.

Patch by Suyog Sarda.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210186 91177308-0d34-0410-b5e6-96231b3b80d8
Support: add additional comment for ARM EH structure

Replicate the fact that ARM::WinEH::RuntimeFunction purposefully does not merge
functions to accommodate raw data access use cases in tools such as readobj.
Pointed out by Renato during post-commit review.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210189 91177308-0d34-0410-b5e6-96231b3b80d8
Support: style/documentation cleanup for format

This is purely a documentation/whitespace cleanup for the format support
functions.

The current style does not duplicate the function/class names in the
documentation; conform to this style.

Additionally, there was a large amount of duplication of comments that added no
real value.  Use block comments for the related sets of functions which are used
for type deduction and parameter container classes.

No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210190 91177308-0d34-0410-b5e6-96231b3b80d8
tools: introduce StreamWriter::printBoolean

Add a helper print method to print a boolean value as "Yes" or "No".  This is
intended to be used by the Windows ARM EH printer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210191 91177308-0d34-0410-b5e6-96231b3b80d8
tools: initial implementation of WoA EH decoding

Add support to llvm-readobj to decode Windows ARM Exception Handling data.  This
uses the previously added datastructures to decode the information into a format
that can be used by tests.  This is a necessary step to add support for emitting
Windows on ARM exception handling information.

A fair amount of formatting inspiration is drawn from the Win64 EH printer as
well as the ARM EHABI printer.  This allows for a reasonably thorough look into
the encoded data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210192 91177308-0d34-0410-b5e6-96231b3b80d8
tools: fix silly typo in llvm-readobj

Case insensitive case preserving file systems are not a good choice for
development.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210193 91177308-0d34-0410-b5e6-96231b3b80d8
tools: fix parenthesis warning from GCC

Add parenthesis as suggested by GCC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210194 91177308-0d34-0410-b5e6-96231b3b80d8
XFAIL: test/DebugInfo/missing-abstract-variable.ll on mips and ppc64 due to an inlined parameter that goes missing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210200 91177308-0d34-0410-b5e6-96231b3b80d8