msm: mdss: push wait for fences and ping pong done as late as possible

All the configuration up until MDP flush is double buffered. This means
we are able to do all hardware programming without settings taking
effect until flush happens. Perform all programming, wait for fences
and wait for previous frame is done just before the flush in order to
reduce the time between last frame done and kickoff of next one.

Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Revert "msm: mdss: fix sync fence deadlock when rotator is used"

This reverts commit 3a8809d47ba8b2dd62851b25ac5d22748d1d597a.
mdss: display: edp continuous splash support.

Both edp main link clock and pixel clock are source from PLL.
This patch add edp clock nodes into system clock tree so that
both main link clock and pixel clock are configured properly
to support different panels with different resolution. Edp
related clocks handoff from bootloader are supported.

Change-Id: I6e4096beb9bff0d39f4f850bbc6d2157ac42e524
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Panwar Vivek <vpanwa@codeaurora.org>

Signed-off-by: Manish Kumar <manishku@codeaurora.org>

Conflicts:
	drivers/video/msm/mdss/mdss_edp.c
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Sanitize read of panel properties

Check panel property's values properly before operating on
them.

CRs-Fixed: 562887
Change-Id: I26ce51e8b3a8e9328e7b6370b9c56d67fcdd1901
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Sanitize read of panel properties some more

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: perform proper clock handoff during cont. splash screen

During continuous splash screen need to ensure clocks are properly ref
counted once and released once handoff has happened. Doing it in
different places can lead to improper order and cause clocks to be
disabled. Fix this by centralizing this into footswitch ctrl which is
called when continous splash screen is enabled.

Change-Id: I17f3d5517d9a0583221fdb5c354bf1992ddeddbd
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: implement overlay prepare ioctl

Overlay prepare will allow a full frame with multiple overlays to be
configured at once and perform frame level checks before being pushed to
display. This function guarantees that if the call is successful, the
frame can be displayed successfully on the screen when display commit is
called.

Change-Id: I276b6fe3e0a872a2e93170f3cea1002d3ce0dac9
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: dsi-1 as master clock controller at split display case

During split display case, both dsi controllers share the same
dsi pll(dsi0) dsi-0 clock need to be enabled before dsi-1 and disabled
in the reverse order. This mechanism helps using a unified clock control
logic.

Change-Id: I9fe0095b0427c9c2b7fd84c3179bc8364049cce4
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Add support for ULPS mode for DSI

For smart panels that can refresh display from their internal
RAMs, it is possible to configure the DSI clock and data lanes
in Ultra Low Power State (ULPS) during idle static screen
usecase. Add support for this feature.

[myfluxi: Adapt to hammerhead]
[neo: Some sanitization]

Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Revert "video: msm: Remove some cruft"

This reverts commit 8751a8e597035e6f9cad7e2169343b113ec43756.

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
arm/dt: hammerhead: Enable ULPS mode

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Add SMP parameters into hw capabilites

To handle use cases better, expose smp_mb_cnt and
smp_mb_per_pipe to userspace as part of hardware capability.
Pipes availablity for a use case can be computed taking these
values, based on which, composition decisions can be made.

Change-Id: Ia7cc4db153cdb164a29ae2369d3e991b95aaba65
Signed-off-by: Mayank Chopra <makchopra@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: restrict decimation when layer format is macro-tile

When layer format is macro-tile, decimation cannot be supported. Add the
necessary checks to fail HW configuration for such use-case.

Change-Id: I68adbcdf8014f9ad528e945928f309b221c6dcfd
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: add dynamic clk status check to pipe idle verification

Dynamic clk status of pipe can indicate if that pipe is active or not.
This status in conjunction VBIF halt status of pipe describes the idle
state of the pipe. Add support to parse necessary offsets from DT and
use them to find idle state of the pipe.

Change-Id: I83c6f323d48a85bfc08ff7bcee47f7c3038ea7e1
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: delay freeing buffers for additional vsync

There are cases where if commit happens very close to vsync or in other
uncommon conditions, where MDP will continue fetching from old buffer
address when unmap of the buffer happens. In order to avoid such
scenarios keep a reference of buffers for an additional commit before
unmapping to avoid potential iommu page fault.

Change-Id: Ied61b4851e2d410d71360ad0c119ef21009f91a1
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: ensure pipe is halted before freeing buffers

When pipe is being detached from mixer, there is potential corner case
if underrun occurs at the same time which can cause pipe to flood the
VBIF. On the other hand unmapping a buffer requires VBIF to be idle to
sync TLB, so need to ensure pipe halt is done before freeing the pipe
buffers.

Change-Id: I9686b9d7d17d8dc2a8334157cfa8fa23ba5b47ee
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Handle case when pipe is not idle during cleanup.

When pipe is not idle during cleanup, MDP can go into an unrecoverable
state, which can lead into other issues. If it gets to this point we
need to recover even if it means changing display contents for a
fraction of time. To handle this follow recovery sequence:
1. Setup the pipes that are not idle to solid fill mode so that nothing
   is fetched from memory on these pipes.
2. Stage them into mixer, flush and wait for a vsync to happen and reset
   sequence to take effect on these.
3. Finally, reattach the current frame pipes to restore display back to
   normal.

Change-Id: If545b56bf32a46699871381d86e80c1980ec3cc7
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: release secure UI buffer as soon as pipe is destroyed

When secure UI session is in progress, need to make sure that the
buffers are released as soon as pipe is freed to make sure secure
session can be properly terminated without any secure UI buffers
remaining as mapped.

CRs-Fixed: 619802
Change-Id: Ia2fa87f3182efc170304a53eb8d6b3f614355245
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: prevent dereferencing of user space pointer

We were dereferencing a userspace pointer in kernel.

Change-Id: I128455904cd396690350fc6b784a8844d594539c
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: mdss: Hold MDP clock Ref count in pan_display path

If handoff fails, the clock ref count becomes 0 and iommu
will get detached. In pan display path, since at that
particular instant iommu gets detached, we use physical
address. After this if iommu is again attached and physical
address is fetched, it can result in continuous IOMMU page
faults. To address this hold MDP clock ref count
in pan display path.

Change-Id: I2370b276acdced2cf22083eb80fcad1b2e454315
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>