Add a couple of peepholes for indirect accumulator loads/stores.
Addressing fixes and IRA/LRA tweaks.

Attempting to improve code generation for addresses. Some target-specific
(for now) tweaks which help somewhat, though they (particularly the LRA
bits) are not entirely robust.
Implement sinking for reloads of singleton-class registers in LRA.
Tidy up some bits from last patch
WIP bits, broken