msm: iommu: Check for NULL genpools during domain teardown

During domain creation, some of the genpools will be set to NULL if
there is not enough memory for creation. Check for these NULL
genpools during domain destruction to avoid NULL dereferences.

Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Refactor remote spinlock defconfig

Refactor the remote spinlock defconfig to allow it to be used with
subsystems other than GPU. This will enhance the usability of this
feature and minimize the chance of errors when enabling this feature.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Add support for selecting remote spinlock in device tree

Certain SoCs need to aquire a remote spinlock before accessing SMMU
registers. This adds support for specifying in the device tree which
SMMUs must take the remote spinlock.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Refactor use of remote spinlock

The remote spinlock was originally meant to synchronize access between
GPU and CPU accessing SMMU. However, there are more use cases that
this remote spinlock serves. This change decouples the spinlock from
GPU and adds support for taking the spinlock only for SMMUs that are
specified in the device tree.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Handle unmapping of PTE properly

The unmap api is currently not handling unmapping of page table
entries (PTE) properly. The generic function that calls the msm
unmap API expects the unmap call to unmap as much as possible
and then return the amount that was unmapped.
In addition the unmap function does not support an arbitrary input
length. However, the function that calls the msm unmap function
assumes that this is supported.

Both these issues can cause mappings to not be unmapped which will
cause subsequent mappings to fail because the mapping already exists.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Refactor page table code

Move code that is specific to short descriptor page table
format to its own file to allow sharing of header file
between long descriptor format page table and short descriptor
page table format.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Add standalone support for secure SMMU

Add a configuration option that allows for testing of systems without
a secure environment. When turning on this option all the IOMMUs will
be programmed by the kernel regardless of whether the IOMMU is secure
or not. This allows for early testing during bringup.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Add cache maintenance for calls into TZ

The scm_call API is no longer providing implicit cache maintenance for
shared buffers. Add cache flushing for buffers heading towards TZ and
cache invalidation for buffers coming from TZ.

Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: don't rely on structure format coming from TZ

The format of the secure fault register dump structure in TZ could
change over time. However, it should always adhere to the following
format (each row is 4 bytes wide):

    |-----------|
    | dump_size |
    | reg1_addr |
    | reg1_val  |
    | ...       |
    | regn_addr |
    | regn_val  |
    |-----------|

Rather than relying on the format of the structure, iterate over
the (addr, value) pairs.

Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Only flush the exact list size

Before giving a list of memory chunks to trustzone, the list needs
to be flushed. The list is simply an array of physical addresses.
The current flush routine takes into account the size of the memory
chunk which is incorrect. The memory chunk size is not used in
calculating the list length since the list is a list of pointers.
Adjust the cache flushing routine to flush the actual size of the
list: size of each entry times the number of entries.

Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Refactor printing of page fault

Refactor the code that reads the registers during an IOMMU
page fault to make the code more maintainable and make it
easier to add support for new registers.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Add printing of 64 bits of TTBR0/1

When we get a page fault we print the value of TTBR0 and
TTBR1. However, we are only printing 32 bits of this 64
bit register.

Print the full 64 bits of this register which will be
helpful when debugging page fault issues.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Revert "msm: iommu: remove tlb_invalidate from the map calls"

This might cause TLB invalidate to hang on unmap calls.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
iommu: msm: Add support for LPAE bfb settings

Certain IOMMUs have support for LPAE and when LPAE is enabled
in these IOMMUs a different set of bfb register settings must
be used to achieve optimal performance.

Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>