Update email address in gdb MAINTAINERS list.
Fix typo in my email address.
Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512vl, CPU_AVX512VL_FLAGS.
	(build_vex_prefix): Don't abort on VEX.W.
	(check_VecOperands): Support BROADCAST_1TO4 and BROADCAST_1TO2.
	(check_VecOperations): Ditto.
	* doc/c-i386.texi: Document avx512vl/.avx512vl.

gas/testsuite/

	* gas/i386/avx512f_vl-intel.d: New.
	* gas/i386/avx512f_vl-opts-intel.d: New.
	* gas/i386/avx512f_vl-opts.d: New.
	* gas/i386/avx512f_vl-opts.s: New.
	* gas/i386/avx512f_vl-wig.s: New.
	* gas/i386/avx512f_vl-wig1-intel.d: New.
	* gas/i386/avx512f_vl-wig1.d: New.
	* gas/i386/avx512f_vl.d: New.
	* gas/i386/avx512f_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512f_vl-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-opts-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-opts.d: New.
	* gas/i386/x86-64-avx512f_vl-opts.s: New.
	* gas/i386/x86-64-avx512f_vl-wig.s: New.
	* gas/i386/x86-64-avx512f_vl-wig1-intel.d: New.
	* gas/i386/x86-64-avx512f_vl-wig1.d: New.
	* gas/i386/x86-64-avx512f_vl.d: New.
	* gas/i386/x86-64-avx512f_vl.s: New.

opcodes/

	* i386-dis.c (intel_operand_size): Support 128/256 length in
	vex_vsib_q_w_dq_mode.
	(OP_E_memory): Add ymmq_mode handling, handle new broadcast.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
	(cpu_flags): Add CpuAVX512VL.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuAVX512VL): New.
	(i386_cpu_flags): Add cpuavx512vl.
	(BROADCAST_1TO4, BROADCAST_1TO2): Define.
	* i386-opc.tbl: Add AVX512VL instructions.
	* i386-tbl.h: Regenerate.
Add support for AVX512VL versions of AVX512CD instructions.

gas/testsuite/

	* gas/i386/avx512cd_vl-intel.d: New.
	* gas/i386/avx512cd_vl.d: New.
	* gas/i386/avx512cd_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512cd_vl-intel.d: New.
	* gas/i386/x86-64-avx512cd_vl.d: New.
	* gas/i386/x86-64-avx512cd_vl.s: New.

opcodes/

	* i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
	* i386-tbl.h: Regenerate.
Add support for AVX512BW instructions and their AVX512VL versions.

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS.
	* doc/c-i386.texi: Document avx512bw/.avx512bw.

gas/testsuite/

	* gas/i386/avx512bw-intel.d: New.
	* gas/i386/avx512bw-opts-intel.d: New.
	* gas/i386/avx512bw-opts.d: New.
	* gas/i386/avx512bw-opts.s: New.
	* gas/i386/avx512bw-wig.s: New.
	* gas/i386/avx512bw-wig1-intel.d: New.
	* gas/i386/avx512bw-wig1.d: New.
	* gas/i386/avx512bw.d: New.
	* gas/i386/avx512bw.s: New.
	* gas/i386/avx512bw_vl-intel.d: New.
	* gas/i386/avx512bw_vl-opts-intel.d: New.
	* gas/i386/avx512bw_vl-opts.d: New.
	* gas/i386/avx512bw_vl-opts.s: New.
	* gas/i386/avx512bw_vl-wig.s: New.
	* gas/i386/avx512bw_vl-wig1-intel.d: New.
	* gas/i386/avx512bw_vl-wig1.d: New.
	* gas/i386/avx512bw_vl.d: New.
	* gas/i386/avx512bw_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512bw-intel.d: New.
	* gas/i386/x86-64-avx512bw-opts-intel.d: New.
	* gas/i386/x86-64-avx512bw-opts.d: New.
	* gas/i386/x86-64-avx512bw-opts.s: New.
	* gas/i386/x86-64-avx512bw-wig.s: New.
	* gas/i386/x86-64-avx512bw-wig1-intel.d: New.
	* gas/i386/x86-64-avx512bw-wig1.d: New.
	* gas/i386/x86-64-avx512bw.d: New.
	* gas/i386/x86-64-avx512bw.s: New.
	* gas/i386/x86-64-avx512bw_vl-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts.d: New.
	* gas/i386/x86-64-avx512bw_vl-opts.s: New.
	* gas/i386/x86-64-avx512bw_vl-wig.s: New.
	* gas/i386/x86-64-avx512bw_vl-wig1-intel.d: New.
	* gas/i386/x86-64-avx512bw_vl-wig1.d: New.
	* gas/i386/x86-64-avx512bw_vl.d: New.
	* gas/i386/x86-64-avx512bw_vl.s: New.

opcodes/

	* i386-dis-evex.h: Add new instructions (prefixes bellow).
	* i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE.
	(enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71.
	(PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31,
	PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63,
	PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
	PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4,
	PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7,
	PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
	PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9,
	PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
	PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4,
	PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA,
	PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
	PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9,
	PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804,
	PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D,
	PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830,
	PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866,
	PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A,
	PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F,
	PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E,
	PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42.
	(VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2,
	VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0,
	VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2,
	VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0,
	VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1,
	VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1,
	VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1,
	VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0,
	VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0,
	VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0,
	VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3,
	EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2,
	EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1,
	EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2,
	EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2,
	EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2,
	EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2.
	(prefix_table): Add entries for new instructions.
	(vex_table) : Ditto.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode,
	mask_bd_mode handling.
	(OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode
	handling.
	(OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode
	handling.
	(OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling.
	(OP_EX): Add dqw_swap_mode handling.
	(OP_VEX): Add mask_bd_mode handling.
	(OP_Mask): Add mask_bd_mode handling.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS.
	(cpu_flags): Add CpuAVX512BW.
	* i386-init.h: Regenerated.
	* i386-opc.h (CpuAVX512BW): New.
	(i386_cpu_flags): Add cpuavx512bw.
	* i386-opc.tbl: Add AVX512BW instructions.
	* i386-tbl.h: Regenerate.
Add AVX512DQ instructions and their AVX512VL variants.

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS.
	* doc/c-i386.texi: Document avx512dq/.avx512dq.

gas/testsuite/

	* gas/i386/avx512dq-intel.d: New.
	* gas/i386/avx512dq.d: New.
	* gas/i386/avx512dq.s: New.
	* gas/i386/avx512dq_vl-intel.d: New.
	* gas/i386/avx512dq_vl.d: New.
	* gas/i386/avx512dq_vl.s: New.
	* gas/i386/i386.exp: Run new AVX-512 tests.
	* gas/i386/x86-64-avx512dq-intel.d: New.
	* gas/i386/x86-64-avx512dq.d: New.
	* gas/i386/x86-64-avx512dq.s: New.
	* gas/i386/x86-64-avx512dq_vl-intel.d: New.
	* gas/i386/x86-64-avx512dq_vl.d: New.
	* gas/i386/x86-64-avx512dq_vl.s: New.

opcodes/

	* i386-dis-evex.h: Updated.
	* i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
	PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16,
	PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51,
	PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
	PREFIX_EVEX_0F3A67.
	(VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2,
	VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0.
	(VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
	EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0,
	EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2,
	EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1,
	EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2,
	EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2,
	EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2.
	(prefix_table): Add entries for new instructions.
	(vex_len_table): Ditto.
	(vex_w_table): Ditto.
	(OP_E_memory): Update xmmq_mode handling.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS.
	(cpu_flags): Add CpuAVX512DQ.
	* i386-init.h: Regenerared.
	* i386-opc.h (CpuAVX512DQ): New.
	(i386_cpu_flags): Add cpuavx512dq.
	* i386-opc.tbl: Add AVX512DQ instructions.
	* i386-tbl.h: Regenerate.
Fix crash on optimized-out entry data values

The tests at
<https://sourceware.org/ml/gdb-patches/2014-07/msg00277.html> show
that comparing a fully optimized out value's contents with a value
that has not been optimized out, or is partially optimized out crashes
GDB:

 (gdb) bt
 #0  __memcmp_sse4_1 () at ../sysdeps/x86_64/multiarch/memcmp-sse4.S:816
 #1  0x00000000005a1914 in memcmp_with_bit_offsets (ptr1=0x202b2f0 "\n", offset1_bits=0, ptr2=0x0, offset2_bits=0, length_bits=32)
     at /home/pedro/gdb/mygit/build/../src/gdb/value.c:678
 #2  0x00000000005a1a05 in value_available_contents_bits_eq (val1=0x2361ad0, offset1=0, val2=0x23683b0, offset2=0, length=32)
     at /home/pedro/gdb/mygit/build/../src/gdb/value.c:717
 #3  0x00000000005a1c09 in value_available_contents_eq (val1=0x2361ad0, offset1=0, val2=0x23683b0, offset2=0, length=4)
     at /home/pedro/gdb/mygit/build/../src/gdb/value.c:769
 #4  0x00000000006033ed in read_frame_arg (sym=0x1b78d20, frame=0x19bca50, argp=0x7fff4aba82b0, entryargp=0x7fff4aba82d0)
     at /home/pedro/gdb/mygit/build/../src/gdb/stack.c:416
 #5  0x0000000000603abb in print_frame_args (func=0x1b78cb0, frame=0x19bca50, num=-1, stream=0x1aea450) at /home/pedro/gdb/mygit/build/../src/gdb/stack.c:671
 #6  0x0000000000604ae8 in print_frame (frame=0x19bca50, print_level=0, print_what=SRC_AND_LOC, print_args=1, sal=...)
     at /home/pedro/gdb/mygit/build/../src/gdb/stack.c:1205
 #7  0x0000000000604050 in print_frame_info (frame=0x19bca50, print_level=0, print_what=SRC_AND_LOC, print_args=1, set_current_sal=1)
     at /home/pedro/gdb/mygit/build/../src/gdb/stack.c:857
 #8  0x00000000006029b3 in print_stack_frame (frame=0x19bca50, print_level=0, print_what=SRC_AND_LOC, set_current_sal=1)
     at /home/pedro/gdb/mygit/build/../src/gdb/stack.c:169
 #9  0x00000000005fc4b8 in print_stop_event (ws=0x7fff4aba8790) at /home/pedro/gdb/mygit/build/../src/gdb/infrun.c:6068
 #10 0x00000000005fc830 in normal_stop () at /home/pedro/gdb/mygit/build/../src/gdb/infrun.c:6214

The 'ptr2=0x0' in frame #1 is val2->contents, and since git 4f14910f:

    gdb/ChangeLog
    2013-11-26  Andrew Burgess  <aburgess@broadcom.com>

        * value.c (allocate_optimized_out_value): Mark value as non-lazy.

... a fully optimized-out value can have it's value contents buffer
NULL.

As a spotgap fix, revert 4f14910f, with a comment.  A full fix would
be too invasive for 7.8.

gdb/
2014-07-22  Pedro Alves  <palves@redhat.com>

	* value.c (allocate_optimized_out_value): Don't mark value as
	non-lazy.
Fix read_frame_arg for optimized-out entry values.

gdb/
2014-07-22  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* stack.c (read_frame_arg): Verify value_optimized_out before calling
	value_available_contents_eq.

gdb/testsuite/
2014-07-22  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* gdb.arch/amd64-entry-value-paramref.S: New file.
	* gdb.arch/amd64-entry-value-paramref.cc: New file.
	* gdb.arch/amd64-entry-value-paramref.exp: New file.
	* gdb.arch/amd64-optimout-repeat.S: New file.
	* gdb.arch/amd64-optimout-repeat.c: New file.
	* gdb.arch/amd64-optimout-repeat.exp: New file.

Message-ID: <20140720150727.GA18488@host2.jankratochvil.net>
Message-ID: <20140711153757.GA452@host2.jankratochvil.net>
Remove setting value address for reference entry value target data value.

I cannot reproduce any wrong case having the code removed.

I just do not find it correct to have it disabled.  But at the same time I do
like much / I do not find correct the code myself.  It is a bit problematic to
have struct value describing a memory content which is no longer present
there.

What happens there:
------------------------------------------------------------------------------
volatile int vv;
static __attribute__((noinline)) int
bar (int &ref) {
  ref = 20;
  vv++; /* break-here */
  return ref;
}
int main (void) {
  int var = 10;
  return bar (var);
}
------------------------------------------------------------------------------
 <4><c7>: Abbrev Number: 13 (DW_TAG_GNU_call_site_parameter)
    <c8>   DW_AT_location    : 1 byte block: 55         (DW_OP_reg5 (rdi))
    <ca>   DW_AT_GNU_call_site_value: 2 byte block: 91 74       (DW_OP_fbreg: -12)
    <cd>   DW_AT_GNU_call_site_data_value: 1 byte block: 3a     (DW_OP_lit10)
------------------------------------------------------------------------------
gdb -ex 'b value_addr' -ex r --args ../gdb ./1 -ex 'watch vv' -ex r -ex 'p &ref@entry'
->
6    return ref;
bar (ref=@0x7fffffffd944: 20, ref@entry=@0x7fffffffd944: 10) at 1.C:25
------------------------------------------------------------------------------
At /* break-here */ struct value variable 'ref' is TYPE_CODE_REF.

With FSF GDB HEAD:
(gdb) x/gx arg1.contents
0x6004000a4ad0: 0x00007fffffffd944
(gdb) p ((struct value *)arg1.location.computed.closure).lval
$1 = lval_memory
(gdb) p/x ((struct value *)arg1.location.computed.closure).location.address
$3 = 0x7fffffffd944

With your #if0-ed code:
(gdb) x/gx arg1.contents
0x6004000a4ad0: 0x00007fffffffd944
(gdb) p ((struct value *)arg1.location.computed.closure).lval
$8 = not_lval
(gdb) p/x ((struct value *)arg1.location.computed.closure).location.address
$9 = 0x0

I do not see how to access
        ((struct value *)arg1.location.computed.closure).location.address
from GDB CLI.  Trying
(gdb) p &ref@entry
will invoke value_addr()'s:
  if (TYPE_CODE (type) == TYPE_CODE_REF)
      /* Copy the value, but change the type from (T&) to (T*).  We
         keep the same location information, which is efficient, and
         allows &(&X) to get the location containing the reference.  */
and therefore the address gets fetched already from
  arg1.contents
and not from
  ((struct value *)arg1.location.computed.closure).location.address
.

And for any other type than TYPE_CODE_REF this code you removed does not get
executed at all.  This DW_AT_GNU_call_site_data_value DWARF was meant
primarily for Fortran but with -O0 entry values do not get produced
and with -Og and higher Fortran always optimizes out the passing by reference.

If you do not like the removed code there I am OK with removing it as I do not
know how to make it's use reproducible for user anyway.  In the worst case
- if there really is some way how to exploit it - one should just get
  Attempt to take address of value not located in memory.
instead of some wrong value and it may be easy to fix then.

gdb/
2014-07-22  Jan Kratochvil  <jan.kratochvil@redhat.com>

	* dwarf2loc.c (value_of_dwarf_reg_entry): Remove setting value address
	for reference entry value target data value.

Message-ID: <20140720150727.GA18488@host2.jankratochvil.net>
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