usb: chipidea: coordinate usb phy initialization for different phy type

For internal PHY (like UTMI), the phy clock may from internal pll,
it is on/off on the fly, the access PORTSC.PTS will hang without
phy clock. So, the usb_phy_init which will open phy clock needs to
be called before hw_phymode_configure.
See: http://marc.info/?l=linux-arm-kernel&m=139350618732108&w=2

For external PHY (like ulpi), it needs to configure portsc.pts before
visit viewport, or the viewport can't be visited. so phy_phymode_configure
needs to be called before usb_phy_init.
See: cd0b42c2a6d2a74244f0053f8960f5dad5842278

It may not the best solution, but it can work for all situations.

Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Chris Ruehl <chris.ruehl@gtsys.com.hk>
Cc: shc_work@mail.ru
Cc: denis@eukrea.com
Cc: festevam@gmail.com
Signed-off-by: Peter Chen <peter.chen@freescale.com>
usb: chipidea: operate on otgsc register in a general way

Use a more general way to read and write otgsc register.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
usb: chipidea: export interrupt enable and status register read functions.

This patch moves usb interrupt enable and status register read functions
from udc driver to core driver to use them in all ci drivers.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>
usb: chipidea: debug: add debug file for controller registers dump.

This patch adds below registers dump for debug:
- USBINTR
- USBSTS
- USBMODE
- USBCMD
- PORTSC
- OTGSC

Signed-off-by: Peter Chen <peter.chen@freescale.com>
Acked-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Li Jun <b47624@freescale.com>