msm: perf: reset perf cycle counter on krait

The cycle counter was not included in the list of
counters being reset. This could result in the cc
enable bit being set randomly, leading to spurious
interrupts when the counter overflowed, even though
the cc was not being used.

Change-Id: Ic7da5e78f932a25d05ce116aeec7a0709ddbb20e
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>