trivial revise( add some assertion)

two assertion: 1. page_size must be 4096; 2. when read hit, the exact
page must include all the blocks to be read.
change mode of writeback, one thread for each

Now it can work, maybe some bugs exist, fix it once we find it.
adjust debug output, and fix one bug

If debug flag is set to 0, debug info will not output. Fix one bug(when
read hit page, read miss blocks)
add procfs interface

add one entry in procfs, to show the status of cache. Next check lock
carefully.
check locks when writeback

It can work now,actually it need not to many locks.
some trivial revision, ignore it.

add path and pointer of block device. change dirty thresh to ratio of
total cache.
change the skeleton, nothing of real substance.

re-arrange the source file and the header file.  A lot need to be
maintained. Go on tomorrow.
some change unimportant.
add connection to cache, but something is wrong when receive data
add user interface, fix bugs of data sync

However, something is wrong when sync index of wrote pages. Come on,
boy!
it can work, but it's fragile

two bugs: 1. when stop IET, writeback go wrong; 2. When data is big
enough, slave blocks because there are no clean page for incoming data.
some change to iscsi cache frame.
some change of connection, serious bugs exist!

When data to sync is big enough, it still result in starvation.
basically fix starvation bug, it's not perfect

About the exit of receiver and asender thread, some bugs need to be
fixed. Next step we focus on ACK.
add data ack, not debuged.