[PPC64] VSX indexed-form loads use wrong instruction format

The VSX instruction definitions for lxsdx, lxvd2x, lxvdsx, and lxvw4x
incorrectly use the XForm_1 instruction format, rather than the
XX1Form instruction format.  This is likely a pasto when creating
these instructions, which were based on lvx and so forth.  This patch
uses the correct format.

The existing reformatting test (test/MC/PowerPC/vsx.s) missed this
because the two formats differ only in that XX1Form has an extension
to the target register field in bit 31.  The tests for these
instructions used a target register of 7, so the default of 0 in bit
31 for XForm_1 didn't expose a problem.  For register numbers 32-63
this would be noticeable.  I've changed the test to use higher
register numbers to verify my change is effective.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219416 91177308-0d34-0410-b5e6-96231b3b80d8
Move DwarfUnit::constructVariableDIE down to DwarfCompileUnit, since it's only needed there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219418 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfDebug.cpp::constructVariableDIE into DwarfCompileUnit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219419 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Legalize INSERT_SUBREG instructions during PostISelFolding

LLVM assumes INSERT_SUBREG will always have register operands, so
we need to legalize non-register operands, like FrameIndexes, to
avoid random assertion failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219420 91177308-0d34-0410-b5e6-96231b3b80d8
[PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint).

This patch removes the PBQPBuilder class and its subclasses and replaces them
with a composable constraints class: PBQPRAConstraint. This allows constraints
that are only required for optimisation (e.g. coalescing, soft pairing) to be
mixed and matched.

This patch also introduces support for target writers to supply custom
constraints for their targets by overriding a TargetSubtargetInfo method:

std::unique_ptr<PBQPRAConstraints> getCustomPBQPConstraints() const;

This patch should have no effect on allocations.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219421 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfDebug::createScopeChildrenDIE down into DwarfCompileUnit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219422 91177308-0d34-0410-b5e6-96231b3b80d8
[PBQP] Add missing headers from r219421.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219425 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Legalize CopyToReg during instruction selection

The instruction emitter will crash if it encounters a CopyToReg
node with a non-register operand like FrameIndex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219428 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219429 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused field from Operand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219430 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "[BasicAA] Revert "Revert r218714 - Make better use of zext and sign information.""

This reverts commit r219135 -- still causing miscompiles in SPEC it seems...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219432 91177308-0d34-0410-b5e6-96231b3b80d8
Remove a compiler bug workaround from 2007. The affected versions of gcc are long gone.

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219433 91177308-0d34-0410-b5e6-96231b3b80d8
[Reassociate] Don't canonicalize X - undef to X + (-undef).

Phabricator Revision: http://reviews.llvm.org/D5674
PR21205

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219434 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfDebug::constructSubprogramScopeDIE down into DwarfCompileUnit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219436 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfDebug::createAndAddScopeChildren down into DwarfCompileUnit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219437 91177308-0d34-0410-b5e6-96231b3b80d8
Remove unused parameter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219440 91177308-0d34-0410-b5e6-96231b3b80d8
Fix bug in GPR to FPR moves in PPC64LE.

The current implementation of GPR->FPR register moves uses a stack slot. This mechanism writes a double word and reads a word. In big-endian the load address must be displaced by 4-bytes in order to get the right value. In little endian this is no longer required. This patch fixes the issue and adds LE regression tests to fast-isel-conversion which currently expose this problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219441 91177308-0d34-0410-b5e6-96231b3b80d8
Add ApplePropertyString dump helper to Dwarf.{h|cpp}.

Reviewers: dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5688

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219442 91177308-0d34-0410-b5e6-96231b3b80d8
delete function name from comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219443 91177308-0d34-0410-b5e6-96231b3b80d8
delete function names from comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219444 91177308-0d34-0410-b5e6-96231b3b80d8