msm_serial_hs:Enable Error/Break Char off

Follow the hardware sequence of enabling
RX_ERROR_CHAR_OFF and RX_BREAK_ZERO_CHAR_OFF in
MR2 register, for not allowing the Break and
parity/frame Error characters into Rx FIFO.

CRs-Fixed: 538141
Change-Id: I24f73eea456c4cb2a68b1655bcd5426426ca7d97
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
msm_serial_hs: Initialize tty_flush_recieve while Port Open

Initialize the tty_flush_recieve to default value during
Port Open to avoid a corner case where Tx bytes may get queued
twice by UART in the absence of initialization.

Corner Case:
UART client calls uart_flush_buffer() API to flush the
data on Tx while UART Tx is in middle of operation.
If client immediately calls UART Port close followed by UART Tx
after Port-Open, it may result in queueing same bytes twice

CRs-Fixed: 590459
Change-Id: Ied9d33265060e1fde7fc98e29f58d3eff6ddc3c4
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Disable RX PIPE before sps_disconnect

We need to disable RX PIPE interrupt to avoid any
race condition between sps_disconnect and bam_isr

CRs-Fixed: 606112
Change-Id: Id5192668d7001b1e3021b1751e7d818316722d5c
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Manage clock path-vote correctly

clock path vote is needed for core and iface vote,
so remove it after these votes are removed, and
make sure clock path vote/unvote are balanced by
removing unnecessary clock path vote

CRs-Fixed: 606403
Change-Id: I2ca2ef1cac3f0aacb7d21eb4da8bed3d39e0158c
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
msm_serial_hs: Dynamic allocation of port structures

This patch allocates the msm_hs_port structures
dynamically during probe and cleans up during exit.
The msm_hs_get_uart_port function now looks up the
uart_state data structure to find the right uart_port.

Change-Id: I3876959eb41173d2115d2c1acfc612b75ca2e46a
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: Implement driver functionality to be closer to HW spec

Implement TX callflow to be in accordance with HW spec and make
sure TXEMT clock off logic is correct. On receiver side, issue
force stale interrupt and make sure upper layer get bytes upto
size of RX buffer

CRs-Fixed: 575119
Change-Id: Iee469b0ba489386b571a86897b62eae84ff34ca5
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
msm_serial_hs: Defensive checks

Add defensive checks in the APIs exposed to clients
and tty layer to avoid unclocked access

CRs-Fixed: 593860
Change-Id: Ibb80b18143a3b90156a7043fd66d4097f7c073e1
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: fix unbalanced clock vote during port close

This change fixes the clock voting logic when the port is closed and
prevents the clock votes from going negative. Clocks are voted for when
the port is being closed and the conditional unvote based on the clock
state will always be true if the earlier vote is not downvoted before
this check is done. This change also protects agains erroneous, unbalanced
client votes, leading to instabilities.

CRs-Fixed: 550668
Change-Id: I391ac69601314757821b3ffb931a00647a64c583
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: Avoid RX getting stuck during rapid clock on/off

Due to race conditions in clock off and clock on sequence
BAM RX descriptor doesn't get queued or may get queued multiple
times. These issues may showup when the client issues rapid clock-on
clock-off operations.
This patch optimizes clock-off sequence while synchronizing clock
off/on with the BAM RX callback (In BAM RX callback, Forcestale
is not issued for every BAM RX callback).

CRs-Fixed: 601140
Change-Id: I882bb57b597f5789daa5fef33a4bc8da174110d0
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Program RFR to synchronize clock-off sequence with HW.

Assert the RFR line during clock off and de-assert
it after the clock off is successful. This is to avoid
the data to be coming from the client during clock off.

Change-Id: I6cad22a63ebd3cfaa20c52445584829b382b7e3a
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Akhila Musunuri <makhila@codeaurora.org>
msm_serial_hs: Programing the TX FIFO watermark level to 4

As per the Hardware Data Book recommendation the
TX FIFO watermark level should not be zero.
Hence programing the TX FIFO watermark level to
4 to avoid corner cases

CRs-Fixed: 621214
Change-Id: Icee051bd37c389f31a010b51ffaf5d46854306b5
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Race Condition during Baud Rate Configuration

Race Condition:
==============
CPU 0:
1.) Rx BAM pipe got disconnected during Baud Rate Cnfg
2.) Rx tasklet got scheduled
3.) Tasklet is issuing Rx command to BAM
4.) BAM API aquired spinlock and accessed Null Pointer
This lead to Null Pointer Access and Crash
CPU 1:
5.) As part of baud rate configuration process CPU 1
called BAM Rx Connect API
6.) BAM API is trying acquire Spinlock
7.) Spinlock is not released by CPU0
This lead to BUG ON

Fix:
===
During Baud Rate Configuration, if Rx command is queued
set the flag for not issuing any Rx command to BAM
Adding rx_cmd_exec variable to avoid command getting
queued twice without callback for the first

Change-Id: I800180cba22b1d0326147a21f175d06e4641f6c4
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Remove code dependency on flag tty_flush_receive

Removing code dependency on the flag and check the
circular buffer directly and make sure that spin lock is taken
appropriately in the tx lower half.

This avoids the condition that can cause
1. tx lower half
2. submit tx command
to race.

CRs-Fixed: 621210
Change-Id: I344a72c3eb9770391576fa0e8f0a8da1ee50ea5b
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Programming BCR Register

UART Core is showing inconsistent behaviour in firing
Stale Timeout Interrupt. Stale Timeout is not happening
at some points. After programming the BCR register the
Stale Timeout is happening as expected.
Also fix the BCR register offset to avoid instablilities when
console is disabled.

CRs-Fixed: 590176, 628523
Change-Id: I5a2522b87fe0951cad80e56f8f880c214d2d3bb5
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Fix the logic for numbering the serial device

This patch fixes the way the UART nodes are enumerated when
aliases are used to identify the nodes. The atomic variable that
used to hold the next available node number was incorrectly being
incremented and if that number were to hold a number that was also
used in an alias, the probe would fail. This patch corrects it.
It also removes the atomic variable and introduces two apis to set
and get the next device number and this logic is protected by a mutex.

Change-Id: Iaee655603b527f3283e1f12d90b1220e9315b529
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: Fix return value handling from platform_get_irq_by_name

platform_get_irq_by_name function returns -ENXIO upon failure.
The return code should be checked for this error code to detect
failures.

CRs-Fixed: 566710
Change-Id: I95b601edf457a19ad8f617700697fae9b5db0f1f
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: remove unused code

Remove support for all pre BLSP Hardware such as Data Mover
DMA and GSBI. Clean up all checks for non BLSP hardware and
refactor the code.

CRs-Fixed: 647392
Change-Id: I2df3d036b0ce4a16d5a693059ca4bc51f17eef85
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Avoid potential unclocked access by clients

Ensure that the port configuration, data transfer activities
occur when hardware resources are available by voting for them
as the client may call shutdown and clock off asynchronously.

CRs-Fixed: 616127
Change-Id: I7ab171c2176589a54b839cfee8bb33840b55abed
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
msm_serial_hs: wait for clock-off to complete before shutdown

Make sure clock-off request completes before closing the port to
avoid unclocked hardware access.

CRs-Fixed: 648827
Change-Id: I953a06c104830c5515551d5edc4dd9c9a037203f
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>
msm_serial_hs: Handle Tx request while Clock OFF

If client initiates a Tx operation when UART clocks are
Off, the driver should not attempt to send data, as this
would result in interacting with unclocked hardware. Add
support to detect this condition and avoid writing to an
unclocked device.
Add a null check after memory allocation.

CRs-Fixed: 629870
Change-Id: I001516e731e73881a29d768d9fb1bf759f3419b9
Signed-off-by: Dilip Kota <c_dkota@codeaurora.org>