Revert "cpufreq: Introduce new relation for freq selection"

This reverts commit 74fe57f884ad888b6cb6b950ce71b5b740fc20c4.
update kernel 3.4.100 > 3.4.101
ASoC: set idle_bias_off=1 for all platform DAPM contexts
The ASoC core currently defaults to using STANDBY rather than OFF for
idle ASoC platform devices, which causes a permanent pm_runtime_get() on
them. This keeps the device active unnecessarily. This can be especially
problematic when the ASoC platform device and DAI device are the same
device.

The distinction between OFF and STANDBY is likely not relevant for ASoC
platform drivers, since they aren't analog devices. So, solve this issue
by hard-coding idle_bias_off = 1 for all ASoC platform devices. If this
turns out to be a problem, this value could be sourced from the
snd_soc_platform_driver, similarly to soc_probe_codec().
updates

mmc/host: remove duplicate entry for 'MMC_MSM'

lib: Pass the correct align offset to bitmap_find_next_zero_area_off
arch: mm: do not invoke OOM killer on kernel fault OOM

Kernel faults are expected to handle OOM conditions gracefully (gup,
uaccess etc.), so they should never invoke the OOM killer.  Reserve this
for faults triggered in user context when it is the only option.

Most architectures already do this, fix up the remaining few.
ARM: 7446/1: spinlock: use ticket algorithm for ARMv6+ locking implementation

	Ticket spinlocks ensure locking fairness by introducing a FIFO-like
	nature to the granting of lock acquisitions and also reducing the
	thundering herd effect when spinning on a lock by allowing the cacheline
	to remain in a shared state amongst the waiting CPUs. This is especially
	important on systems where memory-access times are not necessarily
	uniform when accessing the lock structure (for example, on a
	multi-cluster platform where the lock is allocated into L1 when a CPU
	releases it).

	This patch implements the ticket spinlock algorithm for ARM, replacing
	the simpler implementation for ARMv6+ processors.

	Reviewed-by: Nicolas Pitre <nico@linaro.org>
	Signed-off-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7484/1: Don't enable GENERIC_LOCKBREAK with ticket spinlocks

	Now that ARM has implemented its spinlocks with tickets we don't
	need to use the generic lockbreak algorithm. Remove the Kconfig
	from ARM so that we use the arch_spin_is_contended() definition
	from the asm header. This also saves a word in each lock because
	we don't need the break_lock member anymore.

	Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
	Acked-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7447/1: rwlocks: remove unused branch labels from trylock routines

      The ARM arch_{read,write}_trylock implementations include unused
      backwards branch labels, since we don't retry the locking operation
      if the exclusive store fails.

      This patch removes the labels.

      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7632/1: spinlock: avoid exclusive accesses on unlock() path

      When unlocking a spinlock, all we need to do is increment the owner
      field of the lock. Since only one CPU can be performing an unlock()
      operation for a given lock, this doesn't need to be exclusive.

      This patch simplifies arch_spin_unlock to use non-exclusive accesses
      when updating the owner field of the lock.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock

      An exclusive store instruction may fail for reasons other than lock
      contention (e.g. a cache eviction during the critical section) so, in
      line with other architectures using similar exclusive instructions
      (alpha, mips, powerpc), retry the trylock operation if the lock appears
      to be free but the strex reported failure.

      Reported-by: Tony Thompson <anthony.thompson@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7811/1: locks: use early clobber in arch_spin_trylock

      The res variable is written before we've finished with the input
      operands (namely the lock address), so ensure that we mark it as `early
      clobber' to avoid unintended register sharing.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lock

      Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if
      strex fails on free lock") modifying our arch_spin_trylock to retry the
      acquisition if the lock appeared uncontended, but the strex failed.

      This patch does the same for rwlocks, which were missed by the original
      patch.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: locks: prefetch the destination word for write prior to strex

      The cost of changing a cacheline from shared to exclusive state can be
      significant, especially when this is triggered by an exclusive store,
      since it may result in having to retry the transaction.

      This patch prefixes our {spin,read,write}_[try]lock implementations with
      pldw instructions (on CPUs which support them) to try and grab the line
      in exclusive state from the start. arch_rwlock_t is changed to avoid
      using a volatile member, since this generates compiler warnings when
      falling back on the __builtin_prefetch intrinsic which expects a const
      void * argument.

      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Will Deacon <will.deacon@arm.com>

ARM: 7955/1: spinlock: ensure we have a compiler barrier before sev

      When unlocking a spinlock, we require the following, strictly ordered
      sequence of events:

	      <barrier>	/* dmb */
	      <unlock>
	      <barrier>	/* dsb */
	      <sev>

      Whilst the code does indeed reflect this in terms of the architecture,
      the final <barrier> + <sev> have been contracted into a single inline
      asm without a "memory" clobber, therefore the compiler is at liberty to
      reorder the unlock to the end of the above sequence. In such a case,
      a waiting CPU may be woken up before the lock has been unlocked, leading
      to extremely poor performance.

      This patch reworks the dsb_sev() function to make use of the dsb()
      macro and ensure ordering against the unlock.

      Cc: <stable@vger.kernel.org>
      Reported-by: Mark Rutland <mark.rutland@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs

DCACHE_WORD_ACCESS uses the word-at-a-time API for optimised string
comparisons in the vfs layer.

This patch implements support for load_unaligned_zeropad for ARM CPUs
with native support for unaligned memory accesses (v6+) when running
little-endian.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7424/1: update die handler from x86

Robustify ARM's die() handling with improvements from x86:

 - Fix for a deadlock (before panic in the case of panic_on_oops) if we
   oops under a spinlock which is also used from interrupt handler,
   since the old code was unconditionally enabling interrupts.

 - Usage of arch spinlock so lockdep etc doesn't get involved while
   we're trying to dump out oopses.

 - Deadlock prevention in the unlikely event that die() recurses.

The changes all touch the same few lines of code, so they're done
together in one patch.

Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7421/1: bpf_jit: BPF_S_ANC_ALU_XOR_X support

  JIT support for the XOR operation introduced by the commit
  ffe06c17afbb.

  Signed-off-by: Mircea Gherzan <mgherzan@gmail.com>
  Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

filter: add XOR operation

  Add XOR instruction fo BPF machine. Needed for computing packet hashes.

  Signed-off-by: Jiri Pirko <jpirko@redhat.com>
  Signed-off-by: David S. Miller <davem@davemloft.net>
ARM: 7990/1: asm: rename logical shift macros push pull into lspush lspull

Renames logical shift macros, 'push' and 'pull', defined in
arch/arm/include/asm/assembler.h, into 'lspush' and 'lspull'.
That eliminates name conflict between 'push' logical shift macro
and 'push' instruction mnemonic. That allows assembler.h to be
included in .S files that use 'push' instruction.

Suggested-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
workqueue: change BUG_ON() to WARN_ON()

This BUG_ON() can be triggered if you call schedule_work() before
calling INIT_WORK().  It is a bug definitely, but it's nicer to just
print a stack trace and return.

Reported-by: Matt Renzelmann <mjr@cs.wisc.edu>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
mm: page-writeback.c: local functions should not be exposed globally

The function global_dirtyable_memory is only referenced in this file and
should be marked static to prevent it from being exposed globally.

This quiets the sparse warning:

warning: symbol 'global_dirtyable_memory' was not declared. Should it be static?

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
arm: missing checks of __get_user()/__put_user() return values

Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
arm: if there's no handler we need to restore sigmask, syscall or no syscall

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
ARM: mm: fix MMU mapping of CMA regions

Fix dma_contiguous_remap() so that it continues through all the
regions, even after encountering one that is outside lowmem.
Without this change, if you have two CMA regions, the first outside
lowmem and the seocnd inside lowmem, only the second one will get
set up in the MMU. Data written to that region then doesn't get
automatically flushed from the cache into memory.

Signed-off-by: Chris Brand <cbrand@broadcom.com>
[extended patch subject with 'fix' word]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
sched: Fix HRTICK

David reported that the HRTICK sched feature was borken; which was enough
motivation for me to finally fix it ;-)

We should not allow hrtimer code to do softirq wakeups while holding scheduler
locks. The hrtimer code only needs this when we accidentally try to program an
expired time. We don't much care about those anyway since we have the regular
tick to fall back to.

Reported-by: David Ahern <dsahern@gmail.com>
Tested-by: David Ahern <dsahern@gmail.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20130628091853.GE29209@dyad.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
kernel/module.c: *HACK*: enforce loading of ar6000.ko & cfg80211.ko
tweak min_free_kbytes
msm: pm2: Send SMSM RESET request to modem

On some senarios when the APPS initiate the PC
seqeunce it informs to modem and wait for MODEM
response back within 2.5sec. If it did not happens
then APPS moves to an indefinite loop and not
responde to any modem communication. This causing
the FS dog timeout after 532sec which is quite
a long time where modem do an ERR fatal.

Send SMSM RESET request to modem when there
is a timeout on APPS (> 2.5sec). This change
will reset the target when the timeout on APPS
is more than 2.5sec.

(Here the time is 50000*50 us = 2.5 Sec)
msm: kgsl: Calculate busy interval considering GPU freq as float