arm/crypto: Add optimized AES and SHA1 routines

Add assembler versions of AES and SHA1 for ARM platforms.  This has provided
up to a 50% improvement in IPsec/TCP throughout for tunnels using AES128/SHA1.

Platform   CPU SPeed    Endian   Before (bps)   After (bps)   Improvement

IXP425      533 MHz      big     11217042        15566294        ~38%
KS8695      166 MHz     little    3828549         5795373        ~51%

Signed-off-by: David McCullough <ucdevel@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
ARM: 7626/1: arm/crypto: Make asm SHA-1 and AES code Thumb-2 compatible

This patch fixes aes-armv4.S and sha1-armv4-large.S to work
natively in Thumb.  This allows ARM/Thumb interworking workarounds
to be removed.

I also take the opportunity to convert some explicit assembler
directives for exported functions to the standard
ENTRY()/ENDPROC().

For the code itself:

  * In sha1_block_data_order, use of TEQ with sp is deprecated in
    ARMv7 and not supported in Thumb.  For the branches back to
    .L_00_15 and .L_40_59, the TEQ is converted to a CMP, under the
    assumption that clobbering the C flag here will not cause
    incorrect behaviour.

    For the first branch back to .L_20_39_or_60_79 the C flag is
    important, so sp is moved temporarily into another register so
    that TEQ can be used for the comparison.

  * In the AES code, most forms of register-indexed addressing with
    shifts and rotates are not permitted for loads and stores in
    Thumb, so the address calculation is done using a separate
    instruction for the Thumb case.

The resulting code is unlikely to be optimally scheduled, but it
should not have a large impact given the overall size of the code.
I haven't run any benchmarks.

Signed-off-by: Dave Martin <dave.martin@linaro.org>
Tested-by: David McCullough <ucdevel@gmail.com> (ARM only)
Acked-by: David McCullough <ucdevel@gmail.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Change-Id: I819f921198fd6cabfe0ae422607a5392d49040f4
ARM: 7723/1: crypto: sha1-armv4-large.S: fix SP handling

Make the SHA1 asm code ABI conformant by making sure all stack
accesses occur above the stack pointer.

Origin:
http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=1a9d60d2

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Change-Id: Ia7fbf87db0cba99cb22cb432748a0e7f84192177
defconfig: Enable ARM optimized crypto routines
cpufreq: ondemand: Fix kernel warning in cpufreq_governor_dbs
GOV_STOP event destroys the timer_mutex and is not initialized back
upon GOV_START event.
The Kernel complains at mutex_lock(during GOV_LIMITS event) after
mutex_destroy.

[<c0014918>] (unwind_backtrace+0x0/0x11c)
[<c007c004>] (warn_slowpath_common+0x4c/0x64)
[<c007c034>] (warn_slowpath_null+0x18/0x1c)
[<c079eef8>] (__mutex_lock_slowpath+0x130/0x3c4)
[<c079f1ac>] (mutex_lock+0x20/0x3c) from [<c0540900>]
[<c0540900>] (cpufreq_governor_dbs+0x3c8/0x468)
[<c053d500>] (__cpufreq_governor+0x90/0xe0)
[<c053d774>] (__cpufreq_set_policy+0x224/0x258)
[<c053da58>] (cpufreq_add_dev_interface+0x2b0/0x308)
[<c053e784>] (cpufreq_add_dev+0x500/0x56c)
[<c079247c>] (cpufreq_cpu_callback+0x88/0x9c)
[<c07a2ca8>] (notifier_call_chain+0x38/0x68)
[<c007ded0>] (__cpu_notify+0x28/0x40)
[<c0790024>] (_cpu_up+0xe4/0x118)
[<c0790024>] (cpu_up+0x64/0x80)
[<c0765840>] (store_online+0x48/0x78)
[<c038d0c8>] (dev_attr_store+0x18/0x24)
[<c017be40>] (sysfs_write_file+0x108/0x13c)
[<c012cdfc>] (vfs_write+0xb0/0x128)
[<c012d034>](sys_write+0x38/0x64)

Change-Id: Ie2a796b17209243de731ccf2ab04b7f9e7048df8
CRs-fixed: 576272
Signed-off-by: Anji Jonnala <anjir@codeaurora.org>

Conflicts:
	drivers/cpufreq/cpufreq_ondemand.c
Revert "cpufreq: ondemand: Fix kernel warning in cpufreq_governor_dbs"
cpu_uv: merge with latest commit by gokhanmoral
https://github.com/gokhanmoral/siyahkernel-sgs3/commit/28c0ee6676d588948dd249c02cd2418bf381e1a2
[PATCH] Optimize kernel cfbfillrect function

This is an experimental, not fully tested patch to speed up the kernel
cfbfillrect function used for clearing the screen or filling an area
with a solid color.

The previous implementation was doing reads from the uncached framebuffer,
in certain circumstances, even for simple fills, which for performance
reasons, on most platforms, is ill-advised unless strictly necessary to
conform to the raster operation. In these circumstances, doing 64-bit
access on 64-bit systems does not serve much purpose except for probing
for corner-case bugs and race conditions in the hardware's framebuffer
bus implementation. On all systems, for 16bpp, it is better to take
advantage of write-combining features of the framebuffer and write a
half-word if required for the left and right edges.

Additionally, on most platforms, integer divides are relatively slow so are
best avoided, especially in inner loops.

This patch implements optimizations for 16bpp and 32bpp that avoid
framebuffer read operations during cfbfillrect if the raster-operation
is GXcopy. This applies to both 32-bit (BITS_PER_LONG) and 64-bit
systems (BITS_PER_LONG == 64). Although cfbfillrect is not usually a
bottleneck for the console text framebuffer (because regions filled
usually are aligned to a multiple of 2 or 4 x-coordinate and reads
are avoided), in some use-cases this patch could deliver a significant
speed-up.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
[PATCH] Speed up console framebuffer imageblit function

Especially on platforms with a slower CPU but a relatively high
framebuffer fill bandwidth, like current ARM devices, the existing
console monochrome imageblit function used to draw console text is
suboptimal for common pixel depths such as 16bpp and 32bpp. The existing
code is quite general and can deal with several pixel depths. By creating
special case functions for 16bpp and 32bpp, by far the most common pixel
formats used on modern systems, a significant speed-up is attained
which can be readily felt on ARM-based devices like the Raspberry Pi
and the Allwinner platform, but should help any platform using the
fb layer.

The special case functions allow constant folding, eliminating a number
of instructions including divide operations, and allow the use of an
unrolled loop, eliminating instructions with a variable shift size,
reducing source memory access instructions, and eliminating excessive
branching. These unrolled loops also allow much better code optimization
by the C compiler. The code that selects which optimized variant is used
is also simplified, eliminating integer divide instructions.

The speed-up, measured by timing 'cat file.txt' in the console, varies
between 40% and 70%, when testing on the Raspberry Pi and Allwinner
ARM-based platforms, depending on font size and the pixel depth, with
the greater benefit for 32bpp.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
scheduler: compute time-average nr_running per run-queue

Compute the time-average number of running tasks per run-queue for a
trailing window of a fixed time period. The detla add/sub to the
average value is weighted by the amount of time per nr_running value
relative to the total measurement period.

Change-Id: I4b1fa8fee82a549889560ceded4b94bdb811671d
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/108070
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
scheduler: Re-compute time-average nr_running on read
Re-compute time-average nr_running when it is read. This would
prevent reading stalled average value if there were no run-queue
changes for a long time. New average value is returned to the reader,
but not stored to avoid concurrent writes. Light-weight sequential
counter synchronization is used to assure data consistency for
re-computing average.

Change-Id: I08de26087414d6663633c723ddfcbf1099a01ce2
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/108072
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
Tested-by: Ryan Wong <ryanw@nvidia.com>
cpufreq: some work on NeoX stability
cpufreq: Add cpu utilization statistics to aid decisions made by user
space.

https://android.googlesource.com/kernel/msm.git/+/ba17979cf589bb41c3faf265bffb8c2b3043ab17%5E!/

Understanding system load as seen by cpufreq can help userspace
algorithms make better decisions to improve system responsiveness.
One such example would be the MP decision algorithm which mines
various system info to make decisions on hotplugging in/out
the additional cores.

Signed-off-by: Anitha Anand <anithas@codeaurora.org>
(cherry picked from commit cbeef6a)

Change-Id: I8a5fb95380af898076fe0e246fb21e3aa48b33b1
Signed-off-by: Shruthi Krishna <skrish@codeaurora.org>
cpufreq: some work on HYPER stability
cpufreq: some work on intellidemand stability
https://github.com/neobuddy89/NX-Kernel-exynos4/blob/cm-10.1/drivers/cpufreq/cpufreq_intellidemand.c