Add TLB (and CHERI) exception counters.

This change adds CPU TLB (and CHERI) exception counters. The per-cpu
counters are read with syctl and are reset by writing:

hw.cpu.<cpu#>.tlb_miss_cnt	TLB miss exception count
hw.cpu.<cpu#>.tlb_invalid_cnt	TLB invalid exception count
hw.cpu.<cpu#>.tlb_mod_cnt	TLB modification exception count
hw.cpu.<cpu#>.cheri_ccall_cnt	Cheri-only ccall exception count
hw.cpu.<cpu#>.cheri_creturn_cnt	Cheri-only creturn exception count

The option MIPS_EXC_CNTRS must be added to the kernel config to enable.