cpufreq: sync interactive with CM sources and finetune it for Moto G's CPU
cpu: add new hotplug module with a more simplified algorithm (thanks to Bleechd0se)
Thanks Alin.p for making this work without haivn g to make changes for get_couidle_time

Conflicts:
	arch/arm/configs/render_defconfig

Signed-off-by: renderbroken <zkennedy87@gmail.com>
msm: mdss: fix sync fence deadlock when rotator is used

In the current implementation, whenever rotator play is called, it
forces DMA pipes to be released by calling commit on video mode ctl
paths if they are using DMA pipes. Here assumption was that DMA pipes
will either be used in block mode or line mode, all or none. But this
assumption is not valid any more where we can have a use-case where
DMA0 is used for rotator and DMA1 for video mode ctl path. In this
use-case, current implementation can lead to sync fence deadlock. Fix
this by removing obsolete assumption.

Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: kgsl: enable CPU IRQ while suspending context

Make sure that CPU interrupt is enabled before calling adreno
suspend_context when moving from NAP/SLEEP to SUSPEND state.
We send commands to GPU in adreno_drawctxt_switch() which will generate
GPU interrupt. Since CPU interrupt is not enabled, adreno_idle() will
fail because pending interrupt will not be served by CPU this causes
false GPU hang.

Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm: kgsl: don't use sscanf()

Friends do not let friends use sscanf().

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Ananta Kishore K <akollipa@codeaurora.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
workqueue: set delayed_work->timer function on initialization

delayed_work->timer.function is currently initialized during
queue_delayed_work_on().  Export delayed_work_timer_fn() and set
delayed_work timer function during delayed_work initialization
together with other fields.

This ensures the timer function is always valid on an initialized
delayed_work.  This is to help mod_delayed_work() implementation.

To detect delayed_work users which diddle with the internal timer,
trigger WARN if timer function doesn't match on queue.

Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>

Conflicts:
	kernel/workqueue.c

Signed-off-by: renderbroken <zkennedy87@gmail.com>
workqueue: Remove panic

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
msm_hotplug: Disabled by default
Signed-off-by: renderbroken <zkennedy87@gmail.com>
MPDEC: Adjustments
Signed-off-by: renderbroken <zkennedy87@gmail.com>
msm: hotplug: Use correct variable type

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Revert "msm: hotplug: Try conservative load scale"

This reverts commit df893d1ff59ffc01dc70f1c474f01e7e09625278.
msm: hotplug: One doesnt enter fast lane that easy

This help to make fast_lane function that turn on all CORES on high load
little more smart. As small spikes on low freq can generate 100% load value
but freq is 300Mhz and we dont need all cores online!

So enable that TURBO function match only when 2 conditions!

load >= 95
cur_freq on cpu 0 >= 998400

[Render: Modified for Moto G]

[ neo: Code style improvement.
  Thanks @Dorimanx and @Alucard24 ]

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>

Conflicts:
	arch/arm/mach-msm/msm_hotplug.c

Signed-off-by: renderbroken <zkennedy87@gmail.com>
ARM: hw_breakpoint: Clear breakpoints before enabling monitor
 mode

The reset value of the BCR, BVR, WCR, and WVR registers are all
UNKNOWN on ARMv7. Unfortunately, reset_ctrl_regs() clears these
registers *after* enabling monitor mode, not before, and so some
implementations may experience UNPREDICTABLE behavior if the
reset values of these registers are non-zero. Clear the
breakpoints before enabling monitor mode so that we don't
experience boot hangs/loops due to breakpoints being enabled
out of reset.

Change-Id: I029fbe40725e803183544ddd6fe40285de4137e8
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

Conflicts:
	arch/arm/kernel/hw_breakpoint.c

Signed-off-by: renderbroken <zkennedy87@gmail.com>
ARM: mm: rename jump labels in v7_flush_dcache_all function

This patch renames jump labels in v7_flush_dcache_all in order to define
a specific flush cache levels entry point.

TODO: factor out the level flushing loop if considered worthwhile and
      define the input registers requirements.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
ARM: kernel: update __cpu_disable to use cache LoUIS
 maintenance API

When a CPU is hotplugged out caches that reside in its power domain
lose their contents and so must be cleaned to the next memory level.

Currently, __cpu_disable calls flush_cache_all() that for new generation
processor like A15/A7 ends up cleaning and invalidating all cache levels
up to Level of Coherency, which includes the unified L2.

This ends up being a waste of cycles since the L2 cache contents are not
lost on power down.

This patch updates __cpu_disable to use the new LoUIS API cache operations.

Reviewed-by: Santosh Shilimkar <santosh.shilimkar@xxxxxx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
ARM: mm: update __v7_setup() to the new LoUIS cache
 maintenance API

The ARMv7 processor setup function __v7_setup() cleans and invalidates the
CPU cache before enabling MMU to start the CPU with a clean CPU local cache.

But on ARMv7 architectures like Cortex-[A15/A8], this code will end
up flushing the L2 caches(up to level of Coherency) which is undesirable
and expensive. The setup functions are used in the CPU hotplug scenario too
and hence flushing all cache levels should be avoided.

This patch replaces the cache flushing call with the newly introduced
v7 dcache LoUIS API where only cache levels up to LoUIS are cleaned and
invalidated when a processors executes __v7_setup which is the expected
behavior.

For processors like A9 and A5 where the L2 cache is an outer one the
behavior should be unchanged.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@xxxxxx>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx>
Revert "ARM: hw_breakpoint: Clear breakpoints before enabling monitor"

This reverts commit 2ab536b02d30236acfc2a4716f4f10f5cf66a1da.