Reduce android logger size to salvage a few more ram

Signed-off-by: thirdzcee <thirdzcee@gmail.com>
mmc/core: CRC??? disable it,,,

as it states here
"Enabling software CRCs on the data blocks can be a significant (30%)performance cost, and for other reasons may not always be desired."
so i'll just go ahead and disable it then.. :D

Signed-off-by: thirdzcee <thirdzcee@gmail.com>
[PATCH 1/3] Rename ARM assembler push/pull macros

The ARM assembler library functions use a macro called "push" that
along with a macro called "pull" is used to shift bytes around in a
word in an endian-independent way. However, the modern unified
ARM assembler syntax also defines the instruction "push" to push
data onto the stack, which has specific encodings in the Thumb2
instruction set. For prevent possible conflicts going forward, and
to allow the use of the more transparent "push" instruction along
with the modern unified assembler syntax, this patch renames all
occurrences of the "push" macro to "pushbits", as well as renaming
the macro argument, when also called "push", to "pushshift".

For consistency, the macro called "pull" with its argument name
"pull" are also renamed to "pullbits" and "pullshift", respectively.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
(cherry picked from commit ee1b633e2af7b53c34f66e7873e7278dc28daa70)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>
[PATCH 2/3] Optimize copy_page for modern ARM platforms

The existing implementation of copy_page for ARM appears to be
optimized for older platforms. Benchmark testing in a sandbox
environment shows suboptimal performance on modern platforms
like armv6 and armv7, with speed-ups ranging from 10% (Cortex A8)
to 80% (armv6 used in Raspberry Pi) being achievable.

This commit optimizes copy_page and introduces the new compile-time
constant PREFETCH_DISTANCE, defined in cache.h, which when
multiplied by L1_CACHE_BYTES is equal to the offset used for
prefetches performed with the PLD instruction. For platforms where
L1_CACHE_BYTES is 32 (armv5 and armv6), copy_page processes 32 bytes
at a time while doing one prefetch per iteration, while for armv7
(with L1_CACHE_BYTES equal to 64), 64 bytes are processed at at time
with one prefetch per iteration. When no preload instruction is
available (platforms earlier than armv5), no preload instructions
are generated and 32 bytes are processed at at time.

To facilitate specifying instructions for architectures with no
preload instruction, the NO_PLD macro is added to assembler.h,
augmenting the PLD macro.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
(cherry picked from commit dbfc01ea1fb281f362ff228af0985a3c78525295)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>
[PATCH 3/3] Optimize ARM memset and memzero functions

The ARM memset and memzero functions are optimized with lower overhead
for small requests, generation of more 16-bit Thumb2 instructions when
compiled in Thumb2 mode, and configurable destination alignment before
the main block-copying loop.

The new compile-time constant MEMSET_WRITE_ALIGN_BYTES is introduced
in assembler.h, to augment the CALGN macro that previously regulated
32-byte write alignment but was only used on the Feroceon platform.
MEMSET_WRITE_ALIGN_BYTES can have values of 0 (no write alignment),
8, or 32. Apart from Feroceon, memset write alignment of 32 bytes
appears to benefit the armv6 platform, while the armv7 platform
seems benefit from alignment to 8 bytes for memset/memzero.

The CALGN macro is renamed to MEMSET_CALGN for memset and memzero; the
original CALGN macro is reserved for the memcpy family of functions
(memcpy, copy_from_user, copy_to_user) currently implemented in
copy_template.S, and the associated compile time constant
WRITE_ALIGN_BYTES defines the write alignment for memcpy-related
functions that will be utilized in subsequent contributions. Because
the current CALGN implementation in copy_template.S only implements
32-byte write alignment and is broken on Thumb2, it is only enabled
when WRITE_ALIGN_BYTES is equal to 32 and Thumb2 mode is not enabled.

Finally, memset and memzero now include a directive to enable unified
ARM assembler syntax.

Signed-off-by: Harm Hanemaaijer <fgenfb@yahoo.com>
(cherry picked from commit 091544c125a9f3099348da434ba2379e9535fd55)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>
logger: Add sys fs kernel interface to configure Android logger

- now logging can be switched on and off via /sys/kernel/logger_mode/logger_mode interface
- default is 1 (on)

(cherry picked from commit 9c885a21e26ed97b9c2e6828a68187c5b901491c)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>
fs/dcache.c: adaptive vfs_cache_pressure on suspend / resume

low vfs_cache pressure values save battery while idle, while
a low value also causes stutter with longer up times.

(cherry picked from commit c04bcc1f767b80ac310586a58eee92be51de295f)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>
cache_pressure despite the dynamic suspend/resume values

(cherry picked from commit 9f8163b377d4a1040cf9d18c983d97e0f9ec0bd1)
Signed-off-by: thirdzcee <thirdzcee@gmail.com>