abstract link receiver, so I can use it for both data and flow control
put incoming data in data register (read only access from outside)
add ready bit, clearable by outside
use fifof for data out
added noc example
Copied from serialconfig
refactor control logic up into PcieTop
regaining memory throughput performance using pipelined sglist and memserver modules.  This checkin is mostly about correctly sizing the buffering in the dma infra
introduce TlpConnect interface
updated directions for Centos
No content really, just fifos for messages each way
compiles
compiles
simplifying the buffering scheme in the MemServer/SGList infra
start to write rules for operation of switch
Merge branch 'master' of github.com:cambridgehackers/xbsv
Merge pull request #10 from suhaspai/master

centos.md
support RUNPARAM on vc707
shift TLP interface to mkPCIExpressEndpointX7 to TlpConnect
simplify pcie slightly
hoisted mkConnection for Gearbox/7Pcie out from Gearbox, into PcieTop