lmk async compaction

Conflicts:
	drivers/staging/android/lowmemorykiller.c
 lib/decompressors: fix "no limit" output buffer length

When decompressing into memory, the output buffer length is set to some
arbitrarily high value (0x7fffffff) to indicate the output is, virtually,
unlimited in size.

The problem with this is that some platforms have their physical memory at
high physical addresses (0x80000000 or more), and that the output buffer
address and its "unlimited" length cannot be added without overflowing.
An example of this can be found in inflate_fast():

/* next_out is the output buffer address */
out = strm->next_out - OFF;
/* avail_out is the output buffer size. end will overflow if the output
 * address is >= 0x80000104 */
end = out + (strm->avail_out - 257);

This has huge consequences on the performance of kernel decompression,
since the following exit condition of inflate_fast() will be always true:

} while (in < last && out < end);

Indeed, "end" has overflowed and is now always lower than "out".  As a
result, inflate_fast() will return after processing one single byte of
input data, and will thus need to be called an unreasonably high number of
times.  This probably went unnoticed because kernel decompression is fast
enough even with this issue.

Nonetheless, adjusting the output buffer length in such a way that the
above pointer arithmetic never overflows results in a kernel decompression
that is about 3 times faster on affected machines.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Jon Medhurst <tixy@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>

Signed-off-by: Amperific <amperific@gmail.com>
xz: Tweaking

Signed-off-by: Locasto <amperific@gmail.com>
slightly up the l3 opp50 rate to achieve a higher max bus oc
fuck it use smarteflex
SR: Custom SR Tuning v1 - supports MPU, IVA, and CORE

Override kernel default VDDMIN via sysfs (debug fs).
/sys/kernel/debug/smartreflex/sr_*/vmin

Conflicts:
	mkboot/boot.img-ramdisk/sbin/sr
Revert "OMAP3630+: SmartReflex 1p5: remove voltage clamp down"

This reverts commit afadff82e7b2041498c95f266b76b21dda04e703.
lower the vddmin
smartreflex-class1p5: custom voltage: fix unusable voltage corridor for control fuses that are used for more than one OPP
Previously, when using volt_margins to differentiate voltages for different OPPs
using the same control fuse, the usage of the full voltage spectrum was barred.
This patch fixes the issue.

Signed-off-by: Boy Petersen <boypetersen@gmail.com>
ARM: OMAP3+: SmartReflex: add missing platform_set_drvdata()

That's very useful to fetch the correct struct sr_info
from the PM handlers.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
ARM: OMAP3+: SmartReflex: move late_initcall() closer to its argument

no functional changes, trivial patch.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
ARM: OMAP3+: SmartReflex: misc cleanups

There are no functional changes here, only misc cleanups in general:
- re-organize variable declarations,
- converting if {} else if {} else {} into switch statements,
- correct comments typos,
- add/remove white lines to improve readability,
- etc.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

Conflicts:
	arch/arm/mach-omap2/smartreflex.c
ARM: OMAP3+: SmartReflex: micro-optimization for sanity check

val && (val != 1) == val > 1

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
ARM: OMAP3+: SmartReflex: fix the use of debugfs_create_* API

The debugfs_create_* API returns a return code or NULL
in the return ptr in case of problem.
Fix the smartreflex code to take this into account.

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
ARM: OMAP3+: SmartReflex: fix error handling

Fix the code to correctly use IS_ERR and PTR_ERR on the return
values pointers

Reported-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
up the hz
ARM: OMAP2+: hwmod: Restore sysc after a reset

After a softreset, make sure the sysc settings are correctly
restored.

Reported-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
HACK: OMAP2+: Makefile: sequence SR earlier than idle init

SR should be initialized in sequence before idle initialization
is done and after pm basic inits are complete. PM initialization unfortunately
is not too smart and has to depend on initcall sequencing to ensure
proper dependencies are met. instead of fixing the entire PM init
sequence(which is possible with function pointers being registered and invoked,
but needs an entire revamp of OMAP PM's infrastructure), move SR initialization
up in the chain to ensure this works.

Change-Id: I643f73168753f618ccac6fd34b135aeb93923637
Signed-off-by: Nishanth Menon <nm@ti.com>
OMAP3+: PM: DVFS: add qos requirement to prevent interruptions

DVFS transitions are not meant to be interrupted as the interruptions
can cause severe mismatch in configuration sequences involved in DVFS.

We currently have omap_dvfs_lock check made in omap4_enter_sleep
function, however, considering cpuidle path:
a) omap4_enter_sleep is called by cpuidle's omap4_enter_idle_primary
   after the following steps:
   i) set the log state and set power domain state
   ii) WAIT FOR power domain state to transition!!!
  then we call omap4_enter_sleep
b) Now in omap4_enter_idle_secondary,
  GIC disabled, and we directly hit omap4_enter_lowpwer and goes down

We DONOT want this to take place when DVFS frequency configuration,
voltage programming and smartreflex AVS operations take place.

So request for QoS for the period of transition and release once operation
is done as it is less intrusive and takes care of CPU0 or CPU1 activity
to low power states as well.

Change-Id: I7731a3262bf88dd78e279a8c8306850e077865a5
Reported-by: Vinay Chaurasia <vinaych@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
OMAP3630+: SmartReflex : 1p5: add qos request

Since we do calibration sequences out of the DVFS path, we still
need to honor the requirement not to interrupt the hardware activities
by attempting lower power states untill calibration is complete.
Hence request a QoS while we have hardware calibration sequence
active and monitoring is in progress.

We currently have check for work->active and abort as part of trigger
sequence from omap4_enter_sleep function, however,
considering cpuidle path:
a) omap4_enter_sleep is called by cpuidle's omap4_enter_idle_primary
after the following steps:
  i) set the log state and set power domain state
  ii) WAIT for power domain state to transition!!!
  we then call omap4_enter_sleep
b) Now in omap4_enter_idle_secondary,
  GIC disabled, and we directly hit omap4_enter_lowpwer and goes down

We DONOT want these to take place while we are capturing a calibrated
voltage for the OPP.

Change-Id: I217d80b1ffcf7cbe80eea4ceb29363bd2d25178e
Reported-by: Shashi Shekar B.S. <shashi.shekar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>