LLVM JIT: Overhaul llvm_aux.cpp and add coprocessor 0 to it

Stores of registers that had not been loaded, but modified in any part
of the function, could have corrupted the values seen by the emulated
N64.

Coprocessor 0 registers are required by Count updates and interrupt
checks for branches and jumps, which will follow.
LLVM JIT: Fix NOP, CACHE, SYNC and memory store opcodes

NOP, CACHE and SYNC failed to go to the basic block corresponding to
the next instruction.

Memory store opcodes failed to write back pending registers before
returning. They now go to the store block.
LLVM JIT: Give _DS to the names of basic blocks for delay slots
LLVM JIT: Add supporting global variables for coprocessor 0

Recompiling branch, jump and coprocessor 0 opcodes will require the
following global variables:

* g_cp0_regs, which contains the 32 32-bit coprocessor 0 registers;
* next_interupt [sic], which contains the number of cycles to run until
  the next interrupt occurs;
* delay_slot, which is 1 during the execution of a delay slot that may
  raise an exception;
* last_addr, which contains the N64 memory address at which the first
  instruction of the current uninterrupted run of instructions was
  found. This is updated by branches and jumps whenever ending a run.

Support for exiting the current function after an interrupt (by writing
back pending registers, then servicing the interrupt as a tail call) is
included.

The gen_interupt [sic] global function was declared in a C header, but
including that header in C++ results in name mangling. Make sure C and
C++ can use the function.
LLVM JIT: Recompile in-page BEQ, BNE, BGEZ, BLTZ, BLEZ, BGTZ

The implementations only update last_addr (start of the last run of
instructions) and Count if the branch succeeds.

In-page branches may also happen to jump to a different place in the
same function being compiled to LLVM IR. In that case, they can jump
directly to the basic block backing the branch target.