arm/dts: hammerhead: Set panel name

Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: mdss: update DSI ULPS exit sequence

Analog upstream commit: e8c272ba5c3f23e6cece61bde7834cab7922a1d4

When MDSS idle power collapse feature is enabled in conjunction
with the DSI Ultra Low Power State (ULPS) feature, it is possible
that the MDSS GDSC can be turned off once the DSI lanes are in ULPS
mode. When ULPS mode is subsequently exited, the DSI controller
should be reset prior to executing the DSI ULPS sequence so that
the exit sequence conforms with MIPI D-PHY specifications. However,
this could sometimes lead to DSI lanes not being in the stop state
after exiting ULPS leading to DSI command transmission failures.
To address that issue, force the DSI lanes to be in stop state upon
exiting ULPS.

Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: kgsl: Rate limit interrupt error messages

Limit the interrupt error messages to prevent them from
causing watchdog. Most important interrupt errors will still
be printed but the interrupts that do not cause hang can be
rate limited.

Signed-off-by: Dan Trifan <jimsth@gmail.com>

Conflicts:
	drivers/gpu/msm/adreno_a3xx.c

Change-Id: I6f8b7ca590159904d89b98ca25e34448642dd5e1
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Digish Pandya <digishp@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: kgsl: Read fault register on ringbuffer h/w fault

Read the CP_HW_FAULT register which gives more information
about the fault when ringbuffer h/w fault interrupt is
generated. Also, limit the printing of this interrupt to
prevent watchdog timeout.

Signed-off-by: Dan Trifan <jimsth@gmail.com>

Conflicts:
	drivers/gpu/msm/adreno.h
	drivers/gpu/msm/adreno_a3xx.c

CRs-Fixed: 613940
Change-Id: I8eba72ab50553e72f733034c7fa0ea3ca69db343
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Digish Pandya <digishp@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: kgsl: Add ratelimit check to limit excessive kernel logging

In a3xx_err_callback(), ratelimit check is needed to limit error interrupt
reporting messages. This will prevent kernel logs causing watchdog timeout.

Signed-off-by: Dan Trifan <jimsth@gmail.com>

Conflicts:
	drivers/gpu/msm/adreno_a3xx.c

Change-Id: Id01f232fa5dd6b54e1ca9af8d6b7f37f34ed85b8
Signed-off-by: Prabhat Awasthi <pawasthi@codeaurora.org>
Signed-off-by: Digish Pandya <digishp@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>