drm: implement page flipping support for planes

Planes like crtcs would benefit from having page flip event support.
With planes page flip it is now possible to synchronize changing a
framebuffer used by plane with vertical sync events.

Signed-off-by: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com>

Ported from 69d4542d0152893c50839d0a25280b42af64296e.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-plane: Assign page_flip method to drm_plane_funcs

Assign ipu_plane_page_flip to new drm_plane_funcs->page_flip method.
This allows page flip operation in both the primary and overlay planes.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: Implement DRM gamma set

Implement the DRM gamma set API. This API expects that the adapter
will use a gamma-corrected CLUT, but the CLUT on i.MX6 is insufficient
for that purpose.

But the i.MX6 does support gamma correction via a set of registers
that define a piecewise linear approximation to a luminance
gamma correction curve, which is what this implementation uses.

The input gamma-corrected luminance values to ipu_drm_gamma_set() must
be in a specific format defined in the i.MX6 TRM Rev. 1.

Ported from 366aff779e98d72b899d96fe63a4fd1788432a80.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: Implement custom ioctl to set gamma

Implement i.MX specific ioctl to set gamma directly using slope and
y-intercept values that define the piecewise linear gamma correction
curve.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: Add support for interface pixel maps

Adds the framework that allows encoder/connector drivers to create
a new interface pixel mapping passed to imx_drm_panel_format(). The
crtc driver will then pass this pointer on to ipu_dc_init_sync() which
sets up the new mapping in the DC.

Ported from 7e605665edb6c8ac86997b1bc789f8eda96305f6.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: parallel-display: Add interface_pix_map DT property

Define a new devicetree property "interface_pix_map" for use by
i.MX DRM display drivers. This property defines a DI interface
pixel bus mapping. Implement the parsing of this property in the
parallel display driver, and pass on the mapping to
imx_drm_panel_format().

See Documentation/devicetree/bindings/staging/imx-drm/fsl-imx-drm.txt
for a complete description of this property.

Ported from 7432ed1dd3df674bb5de4b0241b4c396479461ce.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: hdmi: set DI clock source to DI pre clock

If DI is firstly bound to ldb and then re-bound to HDMI,
DI clock source will still be routed to LDB clock by ldb driver.
In HDMI driver's encoder_prepare, we have to set DI clock source to
the parent di_pre clock mux to ensure we are having correct clock
chain to drive HDMI display.

Signed-off-by: Jiada Wang <jiada_wang@mentor.com>

Based on ed1e15a8d918a54dfcc5dd614f5c62908c5f3613, except that
it is implemented similarly to imx-ldb, that is, all the required
DI clock muxes are pre-acquired at bind time. Then selecting the
parent pre clock mux at encoder_prepare time is simple, indexed by
the ipu/di mux the display is being routed to.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-crtc: Set the crtc device name

Set the i.mx crtc device name to a more meaningful crtc[0-3], which
matches the device tree phandle names.

Ported from f83c2b5ebcc63ffc2a7f5cf3d5949772371794fb.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: hdmi: Save ipu/di mux for later iomux setup

Store the ipu/di mux in struct imx_hdmi during imx_hdmi_encoder_prepare().
imx_hdmi_encoder_commit() can then use the mux when setting the iomux
instead of looking it up again via imx_drm_encoder_get_mux_id().

Ported from c76d84aae1c74bb6a6a7b37171fd55f1587cbd7f.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: parallel-display: Add support for reset GPIO

Some parallel displays require a reset pin, implement support for one.
Some of these displays also require that the display interface signals
(data enable, clock, HYSNC, VSYNC) be started within 100us after reset
is released. Hence the reset GPIO is set inactive just before the display
interface is made active during mode_set() and DPMS ON.

Ported from 96be27b8ed98cd8b07c3cbfdb34d5b3425d2a6e1.

Signed-off-by: Murali Muthumani <murali.muthumani@de.bosch.com>
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Muzaffar Mahmood <muzaffar_mahmood@mentor.com>
gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()

Adds ipu_cpmem_get_burstsize().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-plane: Assign correct dmfc burst size

According to the imx6 reference manual, the DMFC channel's
burstsize must match the corresponding IDMAC channel's burstsize,
so make sure to pass the IDMAC channel burstsize to
ipu_dmfc_alloc_bandwidth(). We need to move ipu_dmfc_alloc_bandwidth()
to after the channel is setup, in order to first initialize the
channel burstsize, before retrieving it with ipu_cpmem_get_burstsize().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
drm_modes: videomode: add pos/neg pixel clock polarity flag

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-crtc: Use DRM mode flags to configure pixel clock polarity

Previously, pixel clock polarity was hardcoded and wasn't configurable.
This patch adds support to configure the pixel clock polarity from the
DRM mode flags.

Signed-off-by: Mohsin Kazmi <mohsin_kazmi@mentor.com>

Ported from 3ea552773859eec564515d8b93f95ca10e93775a and
28897902838e2f7922d5039f09334380c82f2f9f.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: imx-ldb: Add all defined of video modes

Instead of assuming only a single defined display-timing node in the
device tree, assume there can be multiple modes and register all of
them in imx_ldb_connector_get_modes().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: parallel-display: Add all defined of video modes

Instead of assuming only a single defined display-timing node in the
device tree, assume there can be multiple modes and register all of
them in imx_pd_connector_get_modes().

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-crtc: Disable fb on crtc unbind

Call ipu_fb_disable() in the crtc unbind method, in case the
crtc has been left enabled.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: imx-ldb: Use DDC probe as connection detect

If a ddc node was specified in the device tree, use it in
imx_ldb_connector_detect() to probe the ddc with drm_probe_ddc(), if
the result is success, we know there is a display connected so return
connected status. Otherwise (no ddc specified in DT) we just have to
assume connected status.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: ipuv3-crtc: Implement mode_set_base

Implement the mode_set_base drm_crtc_helper callback. DRM core calls
this method when there is a SetCrtc request but only the framebuffer
and/or the x/y scanout position in the framebuffer has changed and no
other video mode parameters have changed.

So mode_set_base is similar to a page flip except that there is no
page flip event handling. So ipu_crtc_mode_set_base() simply calls
ipu_plane_page_flip() with a NULL event pointer. A reference on the
vblank interrupt will be acquired and then released when the flip
completes, as in a normal page flip.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
imx-drm: Cancel pending page flip events at preclose

At preclose, destroy page flip events that are pending on every
plane.

Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>