COmment structural RF - is not useful as bug was different
Add misc macro for post-synthesis simulation:
See
generate_libnangate to generate HDL file from lib file
generate_simulation to flatten the DLX design and generate a gate-level modelsim-compatible HDL file
(plus sdf timing description)
DLX_syn.do to start a simulation with the SDF file included (very LONG job, be careful..)
tb_dlx_postsynthesis=tb_dlx but w/gate-level architecture!