ARM: swp_emulate: *squashing updates*

ARM: missing ->mmap_sem around find_vma() in swp_emulate.c

	find_vma() is *not* safe when somebody else is removing vmas.  Not just
	the return value might get bogus just as you are getting it (this instance
	doesn't try to dereference the resulting vma), the search itself can get
	buggered in rather spectacular ways.  IOW, ->mmap_sem really, really is
	not optional here.

	Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
	Cc: <stable@vger.kernel.org>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

get rid of a bunch of open-coded create_proc_read_entry()

arm: Don't use create_proc_read_entry()

	Don't use create_proc_read_entry() as that is deprecated, but rather use
	proc_create_data() and seq_file instead.

	Signed-off-by: David Howells <dhowells@redhat.com>
	Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
ARM: Allow arm_memblock_steal() to remove memory from any RAM region

Allow arm_memblock_steal() to remove memory from any RAM region,
including highmem areas.  This allows memory to be stolen from the
very top of declared memory, including highmem areas, rather than
our precious lowmem.

Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
net: Performance fix for process_backlog

In process_backlog the input_pkt_queue is only checked once for new
packets and quota is artificially reduced to reflect precisely the
number of packets on the input_pkt_queue so that the loop exits
appropriately.

This patches changes the behavior to be more straightforward and
less convoluted. Packets are processed until either the quota
is met or there are no more packets to process.

This patch seems to provide a small, but noticeable performance
improvement. The performance improvement is a result of staying
in the process_backlog loop longer which can reduce number of IPI's.

Performance data using super_netperf TCP_RR with 200 flows:

Before fix:

88.06% CPU utilization
125/190/309 90/95/99% latencies
1.46808e+06 tps
1145382 intrs.sec.

With fix:

87.73% CPU utilization
122/183/296 90/95/99% latencies
1.4921e+06 tps
1021674.30 intrs./sec.

Signed-off-by: Tom Herbert <therbert@google.com>
Acked-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
ARM: 7446/1: spinlock: use ticket algorithm for ARMv6+ locking implementation

	Ticket spinlocks ensure locking fairness by introducing a FIFO-like
	nature to the granting of lock acquisitions and also reducing the
	thundering herd effect when spinning on a lock by allowing the cacheline
	to remain in a shared state amongst the waiting CPUs. This is especially
	important on systems where memory-access times are not necessarily
	uniform when accessing the lock structure (for example, on a
	multi-cluster platform where the lock is allocated into L1 when a CPU
	releases it).

	This patch implements the ticket spinlock algorithm for ARM, replacing
	the simpler implementation for ARMv6+ processors.

	Reviewed-by: Nicolas Pitre <nico@linaro.org>
	Signed-off-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7484/1: Don't enable GENERIC_LOCKBREAK with ticket spinlocks

	Now that ARM has implemented its spinlocks with tickets we don't
	need to use the generic lockbreak algorithm. Remove the Kconfig
	from ARM so that we use the arch_spin_is_contended() definition
	from the asm header. This also saves a word in each lock because
	we don't need the break_lock member anymore.

	Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
	Acked-by: Will Deacon <will.deacon@arm.com>
	Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7447/1: rwlocks: remove unused branch labels from trylock routines

      The ARM arch_{read,write}_trylock implementations include unused
      backwards branch labels, since we don't retry the locking operation
      if the exclusive store fails.

      This patch removes the labels.

      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7632/1: spinlock: avoid exclusive accesses on unlock() path

      When unlocking a spinlock, all we need to do is increment the owner
      field of the lock. Since only one CPU can be performing an unlock()
      operation for a given lock, this doesn't need to be exclusive.

      This patch simplifies arch_spin_unlock to use non-exclusive accesses
      when updating the owner field of the lock.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock

      An exclusive store instruction may fail for reasons other than lock
      contention (e.g. a cache eviction during the critical section) so, in
      line with other architectures using similar exclusive instructions
      (alpha, mips, powerpc), retry the trylock operation if the lock appears
      to be free but the strex reported failure.

      Reported-by: Tony Thompson <anthony.thompson@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7811/1: locks: use early clobber in arch_spin_trylock

      The res variable is written before we've finished with the input
      operands (namely the lock address), so ensure that we mark it as `early
      clobber' to avoid unintended register sharing.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lock

      Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if
      strex fails on free lock") modifying our arch_spin_trylock to retry the
      acquisition if the lock appeared uncontended, but the strex failed.

      This patch does the same for rwlocks, which were missed by the original
      patch.

      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

ARM: locks: prefetch the destination word for write prior to strex

      The cost of changing a cacheline from shared to exclusive state can be
      significant, especially when this is triggered by an exclusive store,
      since it may result in having to retry the transaction.

      This patch prefixes our {spin,read,write}_[try]lock implementations with
      pldw instructions (on CPUs which support them) to try and grab the line
      in exclusive state from the start. arch_rwlock_t is changed to avoid
      using a volatile member, since this generates compiler warnings when
      falling back on the __builtin_prefetch intrinsic which expects a const
      void * argument.

      Acked-by: Nicolas Pitre <nico@linaro.org>
      Signed-off-by: Will Deacon <will.deacon@arm.com>

ARM: 7955/1: spinlock: ensure we have a compiler barrier before sev

      When unlocking a spinlock, we require the following, strictly ordered
      sequence of events:

	      <barrier>	/* dmb */
	      <unlock>
	      <barrier>	/* dsb */
	      <sev>

      Whilst the code does indeed reflect this in terms of the architecture,
      the final <barrier> + <sev> have been contracted into a single inline
      asm without a "memory" clobber, therefore the compiler is at liberty to
      reorder the unlock to the end of the above sequence. In such a case,
      a waiting CPU may be woken up before the lock has been unlocked, leading
      to extremely poor performance.

      This patch reworks the dsb_sev() function to make use of the dsb()
      macro and ensure ordering against the unlock.

      Cc: <stable@vger.kernel.org>
      Reported-by: Mark Rutland <mark.rutland@arm.com>
      Signed-off-by: Will Deacon <will.deacon@arm.com>
      Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 7987/1: ARM : unwinder : Prevent data abort due to stack overflow

While unwinding backtrace, stack overflow is possible. This stack
overflow can sometimes lead to data abort in system if the area after
stack is not mapped to physical memory.

To prevent this problem from happening, execute the instructions that
can cause a data abort in separate helper functions, where a check for
feasibility is made before reading each word from the stack.

Signed-off-by: Anurag Aggarwal <a.anurag@samsung.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: 8052/1: unwind: Fix handling of "Pop r4-r[4+nnn],r14" opcode

The arm EABI states that unwind opcode 10100nnn means pop register r4-4[4+nnn],aditionally there is a similar unwind opcode: 10101nnn which means the same thing plus popping r14. Those two cases are handled by the unwind_exec_pop_r4_to_rN function which checks whether the 4th bit is set and does r14 popping.

However, up until now it has been checking whether the 8th bit was set (mask & 0x80) instead of the 4th (mask & 0x8), a simple to make typo but this meant that we were always popping r14 even if we had the former opcode.

This patch changes the mask so that the 2 unwind opcodes are being handled correctly.

Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Reviewed-by: Anurag Aggarwal <anurag19aggarwal@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>