Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222801 91177308-0d34-0410-b5e6-96231b3b80d8
Make sure that the go bindings call LLVMInitializeMCJITCompilerOptions
so that they initialize the code generation model to the correct
(non-zero) default model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222804 91177308-0d34-0410-b5e6-96231b3b80d8
Make SetMCJITOptimizationLevel more of a method and pass options
as a reference. Move closer to the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222805 91177308-0d34-0410-b5e6-96231b3b80d8
Reformat with gofmt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222806 91177308-0d34-0410-b5e6-96231b3b80d8
Try to make the modules buildbot happy again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222808 91177308-0d34-0410-b5e6-96231b3b80d8
Remove neverHasSideEffects support from TableGen CodeGenInstruction. Everyone should use hasSideEffects now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222809 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Clean up RuntimeDyld's quirky object-ownership/modification scheme.

Previously, when loading an object file, RuntimeDyld (1) took ownership of the
ObjectFile instance (and associated MemoryBuffer), (2) potentially modified the
object in-place, and (3) returned an ObjectImage that managed ownership of the
now-modified object and provided some convenience methods. This scheme accreted
over several years as features were tacked on to RuntimeDyld, and was both
unintuitive and unsafe (See e.g. http://llvm.org/PR20722).

This patch fixes the issue by removing all ownership and in-place modification
of object files from RuntimeDyld. Existing behavior, including debugger
registration, is preserved.

Noteworthy changes include:

(1) ObjectFile instances are now passed to RuntimeDyld by const-ref.
(2) The ObjectImage and ObjectBuffer classes have been removed entirely, they
    existed to model ownership within RuntimeDyld, and so are no longer needed.
(3) RuntimeDyld::loadObject now returns an instance of a new class,
    RuntimeDyld::LoadedObjectInfo, which can be used to construct a modified
    object suitable for registration with the debugger, following the existing
    debugger registration scheme.
(4) The JITRegistrar class has been removed, and the GDBRegistrar class has been
    re-written as a JITEventListener.

This should fix http://llvm.org/PR20722 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222810 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Temporarily disable automatic JIT debugger registration.

The RuntimeDyld cleanup patch r222810 turned on GDB registration for MachO
objects. I expected this to be harmless, but it seems to have broken on
MacsOS. Temporarily disabling debugger registration while I dig in to what's
gone wrong.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222811 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Re-enable GDB registration (temporarily disabled in r222811), but check
that we actually have an object to register first.

For MachO objects, RuntimeDyld::LoadedObjectInfo::getObjectForDebug returns an
empty OwningBinary<ObjectFile> which was causing crashes in the GDB registration
code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222812 91177308-0d34-0410-b5e6-96231b3b80d8
Update ARM ELF relocations to ABI 2.09

Add R_ARM_IRELATIVE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222817 91177308-0d34-0410-b5e6-96231b3b80d8
AVX-512: Scalar ERI intrinsics
including SAE mode and memory operand.
Added AVX512_maskable_scalar template, that should cover all scalar instructions in the future.

The main difference between AVX512_maskable_scalar<> and AVX512_maskable<> is using X86select instead of vselect.
I need it, because I can't create vselect node for MVT::i1 mask for scalar instruction.

http://reviews.llvm.org/D6378



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222820 91177308-0d34-0410-b5e6-96231b3b80d8
Update AArch64 ELF relocations to ABI 1.0

This mostly entails adding relocations, however there are a couple of
changes to existing relocations:

1. R_AARCH64_NONE is defined to be zero rather than 256

R_AARCH64_NONE has been defined to be zero for a long time elsewhere
e.g. binutils and glibc since the submission of the AArch64 port in
2012 so this is required for compatibility.

2. R_AARCH64_TLSDESC_ADR_PAGE renamed to R_AARCH64_TLSDESC_ADR_PAGE21

I don't think there is any way for relocation names to leak out of LLVM
so this should not break anything.

Tested with check-all with no regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222821 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing "override".

Fixes compilation failure in r222810.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222828 91177308-0d34-0410-b5e6-96231b3b80d8
Removing a spurious semicolon; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222830 91177308-0d34-0410-b5e6-96231b3b80d8
Reverting r222828 and r222810-r222812 as they broke the build on Windows.

http://bb.pgr.jp/builders/ninja-clang-i686-msc17-R/builds/11753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222833 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Reapply r222828 and r222810-r222812 with fix for MSVC move-op issues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222840 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Fix missing return statement.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222841 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Create e64 versions of and/or/xor in SILowerI1Copies

This fixes moving boolean constants into registers before operating
on them. They get permuted and shrunk down to e32 anyway later. This
is a temporary fix until the patch that removes these pseudos is
committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222844 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding and64, or64, and xor64 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222846 91177308-0d34-0410-b5e6-96231b3b80d8
[mips][microMIPS] Implement disassembler support for 16-bit instructions LBU16, LHU16, LW16, SB16, SH16 and SW16

Differential Revision: http://reviews.llvm.org/D6405


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222847 91177308-0d34-0410-b5e6-96231b3b80d8