msm: perf: Add L2 support for tracecounters

Add L2 counter output to the tracecounters implementation.
This enables collection of L2 PMU counter values upon context switch.
Set up filtering based on number of L2 counters and number of cores.
Read L2 counter values and display them along with L1 counter values.

Change-Id: I8bbbd251ee52c66505d22ccf037c601013a916f0
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
Signed-off-by: Mekala Natarajan <mekalan@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: Chet Kener <Cl3Kener@gmail.com>

Conflicts:
	arch/arm/mach-msm/perf_debug.c
	arch/arm/mach-msm/perf_trace_counters.h