[DISCO_F429ZI] changed clock settings

Original STM32Cube F4 driver sets SYSCLK for STM32F429 to 16MHz. This
adds a 168MHz and 180MHz configuration to system_stm32f4xx.c generated
by STM32CubeMX code generator. The rtos clock configuration is changed
too. In singletest.py run everything is OK.
[DISCO_F429ZI] changed clock settings

Correction of wrong comments.
Merge pull request #797 from ohagendorf/DISCO_F429_clockcycle

Targets: DISCO_F429ZI - clock frequency additions