Changed mnemonic of breq/brne to brz/brnz to clarify operation

MIP's breq/brne take in multiple registers to compare, however the
c16 simply tests against zero/not zero.

true breq/brne instruction can be created like so:

sub ra,rb,rt
brz imm8        => breq ra,rb,imm8

sub ra,rb,rt
brnz imm8       => brne ra,rb,imm8
Added actual encoding of each instruction to clear up any ambiguities

Also added the useul mnemonics to the list of encodings and removed
some redundant information.
Moved destination register to left side of opcode

Assembly now maps directly to instruction encoding
add rd,ra,rb    =>  0100 1 ddd aaa 00 bbb
add rd,ra,imm5  =>  0100 1 ddd aaa iiiii

Also the mul/div instructions are less confusing
mul rd,ra,rb    => (rd,ra) := ra * rb